Alexander Nadel

Orcid: 0000-0003-4679-892X

According to our database1, Alexander Nadel authored at least 36 papers between 2005 and 2023.

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Bibliography

2023
Solving Huge Instances with Intel(R) SAT Solver.
Proceedings of the 26th International Conference on Theory and Applications of Satisfiability Testing, 2023

AllSAT for Combinational Circuits.
Proceedings of the 26th International Conference on Theory and Applications of Satisfiability Testing, 2023

2022
Introducing Intel(R) SAT Solver.
Proceedings of the 25th International Conference on Theory and Applications of Satisfiability Testing, 2022

2021
Local Search with a SAT Oracle for Combinatorial Optimization.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2021

2020
Polarity and Variable Selection Heuristics for SAT-Based Anytime MaxSAT.
J. Satisf. Boolean Model. Comput., 2020

On Optimizing a Generic Function in SAT.
Proceedings of the 2020 Formal Methods in Computer Aided Design, 2020

Anytime Algorithms for MaxSAT and Beyond.
Proceedings of the 2020 Formal Methods in Computer Aided Design, 2020

2019
Anytime Weighted MaxSAT with Improved Polarity Selection and Bit-Vector Optimization.
Proceedings of the 2019 Formal Methods in Computer Aided Design, 2019

2018
Chronological Backtracking.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2018, 2018

Solving MaxSAT with Bit-Vector Optimization.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2018, 2018

2017
Solving Constraints over Bit-Vectors with SAT-based Model Checking.
Proceedings of the 15th International Workshop on Satisfiability Modulo Theories affiliated with the International Conference on Computer-Aided Verification (CAV 2017), Heidelberg, Germany, July 22, 2017

Solving linear arithmetic with SAT-based model checking.
Proceedings of the 2017 Formal Methods in Computer Aided Design, 2017

A Correct-by-Decision Solution for Simultaneous Place and Route.
Proceedings of the Computer Aided Verification - 29th International Conference, 2017

2016
Bit-Vector Optimization.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2016

Routing under constraints.
Proceedings of the 2016 Formal Methods in Computer-Aided Design, 2016

2015
Efficient generation of small interpolants in CNF.
Formal Methods Syst. Des., 2015

Finding Bounded Path in Graph Using SMT for Automatic Clock Routing.
Proceedings of the Computer Aided Verification - 27th International Conference, 2015

2014
Accelerated Deletion-based Extraction of Minimal Unsatisfiable Cores.
J. Satisf. Boolean Model. Comput., 2014

Ultimately Incremental SAT.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2014, 2014

Bit-Vector Rewriting with Automatic Rule Generation.
Proceedings of the Computer Aided Verification - 26th International Conference, 2014

2013
Efficient MUS extraction with resolution.
Proceedings of the Formal Methods in Computer-Aided Design, 2013

2012
Preprocessing in Incremental SAT.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2012, 2012

Efficient SAT Solving under Assumptions.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2012, 2012

2011
From Total Assignment Enumeration to Modern SAT Solver
CoRR, 2011

Generating Diverse Solutions in SAT.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2011, 2011

Implicative Simultaneous Satisfiability and Applications.
Proceedings of the Hardware and Software: Verification and Testing, 2011

2010
Assignment Stack Shrinking.
Proceedings of the Theory and Applications of Satisfiability Testing, 2010

Boosting minimal unsatisfiable core extraction.
Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

Applying SMT in symbolic execution of microcode.
Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

SAT-based semiformal verification of hardware.
Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

2009
Understanding and improving a modern SAT solver
PhD thesis, 2009

2007
Towards a Better Understanding of the Functionality of a Conflict-Driven SAT Solver.
Proceedings of the Theory and Applications of Satisfiability Testing, 2007

A Lazy and Layered SMT($\mathcal{BV}$) Solver for Hard Industrial Verification Problems.
Proceedings of the Computer Aided Verification, 19th International Conference, 2007

2006
A Scalable Algorithm for Minimal Unsatisfiable Core Extraction.
Proceedings of the Theory and Applications of Satisfiability Testing, 2006

2005
A Clause-Based Heuristic for SAT Solvers.
Proceedings of the Theory and Applications of Satisfiability Testing, 2005

Simultaneous SAT-Based Model Checking of Safety Properties.
Proceedings of the Hardware and Software Verification and Testing, 2005


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