Alexander Skavantzos

According to our database1, Alexander Skavantzos authored at least 24 papers between 1985 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2012
GF(2<sup>n</sup>) Montgomery multiplication using Polynomial Residue Arithmetic.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010
Optimal modulus sets for efficient residue-to-binary conversion using the New Chinese Remainder Theorems.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Design of a balanced 8-modulus RNS.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Elliptic Curve Point Multiplication in GF(2<sup>n</sup>) using Polynomial Residue Arithmetic.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007
Large Dynamic Range RNS Systems and their Residue to Binary converters.
J. Circuits Syst. Comput., 2007

2005
On MultiModuli residue number systems with moduli of forms r<sup>a</sup>, r<sup>b</sup>-1, r<sup>c</sup>+1.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2002
Multi-voltage low power convolvers using the polynomial residue number system.
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002

1999
Implementation issues of the two-level residue number system with pairs of conjugate moduli.
IEEE Trans. Signal Process., 1999

Grouped-moduli residue number systems for fast signal processing.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
An Efficient Residue to Weighted Converter for a New Residue Number System.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997
On the binary quadratic residue system with noncoprime moduli.
IEEE Trans. Signal Process., 1997

1994
ROM based methods for computing the squaring operation in modular rings.
J. VLSI Signal Process., 1994

1993
Full Adder-based Inner Product Step Processors for Residue and Quadratic Residue Number Systems.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Systematic design of full adder-based architectures for convolution.
Proceedings of the IEEE International Conference on Acoustics, 1993

1992
Decomposition of Complex Multipliers Using Polynomial Encoding.
IEEE Trans. Computers, 1992

New Multipliers Modulo 2^N - 1.
IEEE Trans. Computers, 1992

Multiplierless signal processors using table look-ups and residue arithmetic.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

1991
Multiplication of complex numbers encoded as polynomials.
J. VLSI Signal Process., 1991

On the polynomial residue number system [digital signal processing].
IEEE Trans. Signal Process., 1991

1990
Linear arrays for residue mappers.
Proceedings of the Application Specific Array Processors, 1990

1989
A complex DSP processor using polynomial encoding.
Proceedings of the IEEE International Conference on Acoustics, 1989

1988
Parallel decomposition of multipliers modulo (2<sup>n</sup>±1).
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1987
On the multidimensional RNS and its applications to the design of fast digital systems.
Proceedings of the IEEE International Conference on Acoustics, 1987

1985
A Radix-4FFT Using Complex RNS Arithmetic.
IEEE Trans. Computers, 1985


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