Alexis Landrault

According to our database1, Alexis Landrault authored at least 9 papers between 2002 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Domain Adaptation for Pedestrian DCNN Detector toward a Specific Scene and an Embedded Platform.
Proceedings of the 14th International Joint Conference on Computer Vision, 2019

2016
HNCP: A many-core microprocessor ASIC approach dedicated to embedded image processing applications.
Microprocess. Microsystems, 2016

Embedded multi-processor system-on-programmable chip for smart camera pose estimation using nonlinear optimization methods.
J. Real Time Image Process., 2016

2014
HNCP-II: A 16-core 65nm microprocessor ASIC for image processing algorithms.
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

A novel flexible 16-core MP-SoC architecture based on parallel skeletons for image processing applications.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Teaching advanced digital ASIC designs by a complex case study.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

2011
Embedding of a real time image stabilization algorithm on a parameterizable SoPC architecture a chip multi-processor approach.
J. Real Time Image Process., 2011

2008
Embedding of a Real Time Image Stabilization Algorithm on SoPC Platform, a Chip Multi-processor Approach.
Proceedings of the Advanced Concepts for Intelligent Vision Systems, 2008

2002
Transistor Level Synthesis Dedicated to Fast I.P. Prototyping.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002


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