Amit Chowdhary

According to our database, Amit Chowdhary authored at least 15 papers between 1994 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Effective linear programming based placement methods.

Sherief Reda, Amit Chowdhary

Proceedings of the 2006 International Symposium on Physical Design, 2006

2005

Area-optimal technology mapping for field-programmable gate arrays based on lookup tables.

Amit Chowdhary, John P. Hayes

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

How accurately can we model timing in a placement engine?

Amit Chowdhary, Karthik Rajagopal, Satish Venkatesan, Tung Cao, Vladimir Tiourin, Yegna Parasuram, Bill Halpin

Proceedings of the 42nd Design Automation Conference, 2005

2003

Timing driven force directed placement with physical net constraints.

Karthik Rajagopal, Tal Shaked, Yegna Parasuram, Tung Cao, Amit Chowdhary, Bill Halpin

Proceedings of the 2003 International Symposium on Physical Design, 2003

Force directed mongrel with physical net constraints.

Sung-Woo Hur, Tung Cao, Karthik Rajagopal, Yegna Parasuram, Amit Chowdhary, Vladimir Tiourin, Bill Halpin

Proceedings of the 40th Design Automation Conference, 2003

2002

General technology mapping for field-programmable gate arrays based on lookup tables.

Amit Chowdhary, John P. Hayes

ACM Trans. Design Autom. Electr. Syst., 2002

A Methodology for Synthesis of Data Path Circuitse.

Amit Chowdhary, Rajesh K. Gupta

IEEE Des. Test Comput., 2002

1999

Extraction of functional regularity in datapath circuits.

Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

1998

A general approach for regularity extraction in datapath circuits.

Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997

Technology mapping for field-programmable gate arrays.

Amit Chowdhary

PhD thesis, 1997

General Modeling and Technology-Mapping Technique for LUT-Based FPGAs.

Amit Chowdhary, John P. Hayes

Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, 1997

1996

A Multi-Terminal Net Router for Field-Programmable Gate Arrays.

Dinesh Bhatia, Amit Chowdhary

VLSI Design, 1996

1995

Technology mapping for field-programmable gate arrays using integer programming.

Amit Chowdhary, John P. Hayes

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Detailed Routing of Multi-Terminal Nets in FPGAs.

Amit Chowdhary, Dinesh Bhatia

Proceedings of the Seventh International Conference on VLSI Design, 1994

Mathematical model for routability analysis of FPGAs.

Dinesh Bhatia, Amit Chowdhary, Spyros Tragoudas

Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994