Andre Szczepanek

According to our database1, Andre Szczepanek authored at least 2 papers between 2007 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
A 225mW 28Gb/s SerDes in 40nm CMOS with 13dB of analog equalization for 100GBASE-LR4 and optical transport lane 4.4 applications.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2007
A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007


  Loading...