According to our database1, Peter Hunt authored at least 7 papers between 1998 and 2016.
Legend:Book In proceedings Article PhD thesis Other
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
FOCUS - Development of a Global Communication and Modeling Platform for Applied and Computational Medicinal Chemists.
J. Chem. Inf. Model., 2015
26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
J. Comput. Aided Mol. Des., 2012
A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
J. Chem. Inf. Model., 2006