Andrea Ballo
Orcid: 0000-0003-1192-0104
According to our database1,
Andrea Ballo
authored at least 34 papers
between 2018 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
A High Efficiency and High Power Density Active AC/DC Converter for Battery-Less US-Powered IMDs in a 28-nm CMOS Technology.
IEEE Access, 2024
2023
Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C<sub>L</sub>.
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
IEEE Trans. Very Large Scale Integr. Syst., September, 2023
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
Demystifying Regulating Active Rectifiers for Energy Harvesting Systems: A Tutorial Assisted by Verilog-A Models.
IEEE Access, 2023
An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed Capacitance.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Triple Clock Boosted Voltage Multiplier: A Design Strategy to Heavily Reduce Rise Time.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
A 28-nm, 0.5-V, 78.5-nA Switched Capacitor Current Reference with Active Trimming for sub-1V Implantable Medical Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Fully On-Chip Charge Pump-based Boost Converter in 65-nm CMOS for Single Solar Cell Powered IC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A 6.3-ppm/°C, 100-nA Current Reference With Active Trimming in 28-nm Bulk CMOS Technology.
IEEE Access, 2022
Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range.
IEEE Access, 2022
A Design Procedure for Sizing Comparators in Active Rectifiers using $g_{m}/I_{D}$ Technique.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
A 0.63 pJ/bit Fully-Digital BPSK Demodulator for US-powered IMDs downlink in a 28-nm bulk CMOS technology.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A Memory-Targeted Dynamic Reconfigurable Charge Pump to Achieve a Power Consumption Reduction in IoT Nodes.
IEEE Access, 2021
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Comparison of the Wide-Frequency Range Dynamic Behavior of the Dickson and Cockcroft-Walton Voltage Multipliers.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
An Efficient AC-DC Converter in 28nm Si-Bulk CMOS Technology for Piezo-Powered Medical Implanted Devices.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Instrum. Meas., 2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Int. J. Circuit Theory Appl., 2020
Int. J. Circuit Theory Appl., 2020
A simple and effective design strategy to increase power conversion efficiency of linear charge pumps.
Int. J. Circuit Theory Appl., 2020
IEEE Access, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Active load with cross-coupled bulk for high-gain high-CMRR nanometer CMOS differential stages.
Int. J. Circuit Theory Appl., 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018