Salvatore Pennisi

Orcid: 0000-0002-5803-484X

Affiliations:
  • University of Catania, Italy


According to our database1, Salvatore Pennisi authored at least 172 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2017, "For contributions to multistage CMOS operational amplifiers".

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2023
Fully Integrated Galvanic Isolation Interface in GaN Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

A 0.3-V 8.5-μ a Bulk-Driven OTA.
IEEE Trans. Very Large Scale Integr. Syst., September, 2023

GaN Monolithic PWM Generator With Dynamic Offset Compensation.
IEEE Access, 2023

15 nA CMOS Analog Voltage Buffer Insensitive to PVT Variations.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Integrated GaN digital soft start-up for switching power converters.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

High-Speed all-GaN Gate Driver with reduced power consumption.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

GBW Optimization in Two-Stage OTAs Operating in Weak Inversion.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022
Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review.
Int. J. Circuit Theory Appl., 2022

A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs.
IEEE Access, 2022

A 0.5-V 28-nm CMOS Inverter-Based Comparator with Threshold Voltage Control.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

1-mS constant-Gm GaN transconductor with embedded process compensation.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Frequency Compensation Scheme for a Full GaN OpAmp driving 1-nF load.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
28-nm CMOS Resistor-Less Voltage Reference with Process Corner Compensation.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020
0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias.
Int. J. Circuit Theory Appl., 2020

Sub-Femto-Farad Resolution Electronic Interfaces for Integrated Capacitive Sensors: A Review.
IEEE Access, 2020

2019
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies.
Microelectron. J., 2019

Active load with cross-coupled bulk for high-gain high-CMRR nanometer CMOS differential stages.
Int. J. Circuit Theory Appl., 2019

CMOS Differential Stage with Improved DC Gain, CMRR and PSRR Performance.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Dual Push-Pull High-Speed Rail-to-Rail CMOS Buffer Amplifier for Flat-Panel Displays.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Switched-Capacitor Power Management Integrated Circuit for Autonomous Internet of Things Node.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of C<sub>L</sub>.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017.
Integr., 2018

Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018

Ultra-Low Power Amplifiers for IoT Nodes.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
0.9-V Class-AB Miller OTA in 0.35-µm CMOS With Threshold-Lowered Non-Tailed Differential Pair.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation.
Int. J. Circuit Theory Appl., 2017

A toolbox for the symbolic analysis and simulation of linear analog circuits.
Proceedings of the 14th International Conference on Synthesis, 2017

Towards a nanofabricated vacuum cold-emitting triode.
Proceedings of the 14th International Conference on Synthesis, 2017

2016
Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Symbolic factorization methodology for multistage amplifier transfer functions.
Int. J. Circuit Theory Appl., 2016

CMOS Non-tailed differential pair.
Int. J. Circuit Theory Appl., 2016

2-V turn-on voltage field-emitting vacuum nanoelectronic device.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A 0.003-mm<sup>2</sup> 50-mW three-stage amplifier driving 10-nF with 2.7-MHz GBW.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

High-tuning-range CMOS band-pass IF filter based on a low-<i>Q</i> cascaded biquad optimization technique.
Int. J. Circuit Theory Appl., 2015

A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

0.7-V bulk-driven three-stage class-AB OTA.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4-10-3 mm2.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Single-miller all-passive compensation network for three-stage OTAs.
Proceedings of the European Conference on Circuit Theory and Design, 2015

2014
88-µ A 1-MHz Stray-Insensitive CMOS Current-Mode Interface IC for Differential Capacitive Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Low-Power Class-AB CMOS Voltage Feedback Current Operational Amplifier With Tunable Gain and Bandwidth.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A new accurate analytical expression for the SiPM transient response to single photons.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

High-performance frequency compensation topology for four-stage OTAs.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
4-Phase Interleaved Boost Converter With IC Controller for Distributed Photovoltaic Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Adaptive frequency compensation for maximum and constant bandwidth feedback amplifiers.
Int. J. Circuit Theory Appl., 2013

Effect of components relative tolerance in the magnitude response of a Gm-C biquad.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

Estimation of in-cylinder pressure using spark plug discharge current measurements.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

Optimized frequency compensation topology for low-power three-stage OTAs.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
Low voltage-drop bypass switch for photovoltaic applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Autotuning technique for CMOS current mode capacitive sensor interfaces.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Constant and maximum bandwidth feedback amplifier with adaptive frequency compensation.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A low-quiescent current two-input/output buffer amplifier for LCDs.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Reply to "Comments on Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers".
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

0.13-µm CMOS tunable transconductor based on the body-driven gain boosting technique with application in Gm-C filters.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Design strategy for biquad-based continuous-time low-pass filters.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
Improved Low-Power High-Speed Buffer amplifier with slew-Rate Enhancement for LCD Applications.
J. Circuits Syst. Comput., 2010

Analytical comparison of reversed nested Miller frequency compensation techniques.
Int. J. Circuit Theory Appl., 2010

Step-response optimisation techniques for low-power, high-load, three-stage operational amplifiers driving large capacitive loads.
IET Circuits Devices Syst., 2010

Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

670-na CMOS OTA for AMLCD Column Driver.
J. Circuits Syst. Comput., 2009

Improved Power-Efficient RNMC Technique with voltage Buffer and Nulling resistors for Low-Power High-Load Three-Stage amplifiers.
J. Circuits Syst. Comput., 2009

0.9-V CMOS cascode amplifier with body-driven gain boosting.
Int. J. Circuit Theory Appl., 2009

Approach to analyse and design nearly sinusoidal oscillators.
IET Circuits Devices Syst., 2009

A New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Step-response Optimization Techniques for Low-power Three-stage Operational Amplifiers for Large Capacitive Load Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

CMOS Body-enhanced Cascode Current Mirror.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Exploitation of the phasor approach for closed-form solution of the Van der Pol's oscillator and sinusoidal oscillators with high-order nonlinearity.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

A high-speed low-power output buffer amplifier for large-size LCD applications.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
Unity-Gain Amplifier With Theoretically Zero Gain Error.
IEEE Trans. Instrum. Meas., 2008

Miller Theorem for Weakly Nonlinear Feedback Circuits and Application to CE Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Wien-Type Oscillators: Evaluation and Optimization of Harmonic Distortion.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Comparison of the Frequency Compensation Techniques for CMOS Two-Stage Miller OTAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS.
IEEE J. Solid State Circuits, 2008

Analytical comparison of frequency compensation techniques in three-stage amplifiers.
Int. J. Circuit Theory Appl., 2008

CMOS current-steering DAC architectures based on the triple-tail cell.
Int. J. Circuit Theory Appl., 2008

An approach to model high-frequency distortion in negative-feedback amplifiers.
Int. J. Circuit Theory Appl., 2008

Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers.
Int. J. Circuit Theory Appl., 2008

Design methodology of Miller frequency compensation with current buffer/amplifier.
IET Circuits Devices Syst., 2008

Mixed-signal flexible architecture for the synthesis of n-port networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Design guidelines for minimum harmonic distortion in a wien oscillator with automatic amplitude control system.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Linearization Technique for Source-Degenerated CMOS Differential Transconductors.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Advances in Reversed Nested Miller Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

The Universal Circuit Simulator: A Mixed-Signal Approach to n-Port Network and Impedance Synthesis.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

CMOS High-CMRR Current Output Stages.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Two CMOS Current Feedback Operational Amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

150 µA CMOS Transconductor with 82 dB SFDR.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Source-degenerated CMOS Transconductor with Auxiliary Linearization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Miller Compensation: Optimization with Current Buffer/Amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Distortion analysis in the frequency domain of a Gm-C biquad.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Very Low Voltage CMOS Two-stage Amplifier.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Sub-1V CMOS OTA with Body-driven Gain Boosting.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

CMOS Miller OTA with Body-Biased Output Stage.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Low quiescent current high speed amplifier for LCD column driver.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

A generalization of Miller formulae for nonlinear feedback networks.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

CMOS voltage feedback current amplifier.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
High-CMRR Current Amplifier Architecture and Its CMOS Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Distortion analysis of Miller-compensated three-stage amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Effects of nonlinear feedback in the frequency domain.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

High-speed CMOS unity-gain current amplifier.
Microelectron. J., 2006

Analysis and evaluation of harmonic distortion in the tunnel diode oscillator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Inverting closed-loop amplifier architecture with reduced gain error and high input impedance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Active reversed nested Miller compensation for three-stage amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Analysis of Harmonic Distortion in the Colpitts Oscillator.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
High-performance and simple CMOS interface circuit for differential capacitive sensors.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Low-voltage high-drive CMOS current feedback op-amp.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Nonidealities of Tow-Thomas biquads Using VOA- and CFOA-based Miller integrators.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

CMOS single-to-differential current amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

High-performance CMOS current feedback operational amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Well-defined design procedure for a three-stage CMOS OTA.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

High-performance CMOS pseudo-differential amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Switched-capacitor body-biasing technique for very low voltage CMOS amplifiers.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2-V CMOS current operational amplifier with high CMRR.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

CMOS class AB single-to-differential transconductor.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Current-steering D/A converter based on triple tail cell.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

CMOS interface for differential capacitive transducers.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

New analytical approach to evaluate harmonic distortion in nonlinear feedback amplifiers.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Distortion analysis of three-stage amplifiers with reversed nested-Miller compensation.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004
Effect of CFOA nonidealities in Miller integrator cells.
IEEE Trans. Circuits Syst. II Express Briefs, 2004

Harmonic distortion in three-stage nested-Miller-compensated amplifiers.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Robust three-state PFD architecture with enhanced frequency acquisition capabilities.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Design guidelines for reversed nested Miller compensation in three-stage amplifiers.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

1.5-V CMOS CCII+ with high current-driving capability.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

Performance comparison of Tow-Thomas biquad filters based on VOAs and CFOAs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Current output stage with improved CMRR.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

A charge injection based CMOS charge-pump.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002
Current-mode A/D fuzzy converter.
IEEE Trans. Fuzzy Syst., 2002

Modelling of source-coupled logic gates.
Int. J. Circuit Theory Appl., 2002

Using a low-voltage COA for high-performance voltage amplification.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

High accuracy CMOS capacitance multiplier.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

A novel pseudo random bit generator for cryptography applications.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Comparison between Miller integrator cells using VOAs and CFOAs.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Hybrid nested Miller compensation with nulling resistors.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Statistical analysis of the resolution in a current-mode ADC.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Bipolar differential cell with improved bandwidth performance.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

A tree-like amplifier architecture for large gain-bandwidth product.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
A high‐performance CMOS CCII.
Int. J. Circuit Theory Appl., 2001

New CMOS tunable transconductor for filtering applications.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Low-voltage continuous-time CMOS current amplifier with dynamic biasing.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Reversed nested Miller compensation with current follower.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Low-voltage CMOS current operational amplifier with class AB input stage.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Feedback amplifiers: a simplified analysis of harmonic distortion in the frequency domain.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Delay estimation of SCL gates with output buffer.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
A true low-voltage CMOS class AB current mirror.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

High-linear class AB transconductor for high-frequency applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
High-speed voltage buffers for the experimental characterization of CMOS transconductance operational amplifiers.
IEEE Trans. Instrum. Meas., 1999

A 20-dB CMOS IF amplifier with embedded single-to-differential input converter.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A class AB CMOS current mirror with low-voltage capability.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Performance parameters of current operational amplifiers.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

A versatile CMOS fully differential current amplifier.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

A low-voltage CMOS 1-Hz low-pass filter.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998
High-drive CMOS current amplifier.
IEEE J. Solid State Circuits, 1998

Harmonic distortion in non-linear amplifier with non-linear feedback.
Int. J. Circuit Theory Appl., 1998

A technique for the reduction of the input resistance of current-mode circuits.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A high-performance CMOS voltage follower.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1996
Low harmonic distortion class AB CMOS current output stage.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995
A schmitt trigger by means of a ccii+.
Int. J. Circuit Theory Appl., 1995

1994
A High-Accuracy High-Speed CMOS Current Comparator.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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