Toru Tanzawa
Orcid: 0000-0001-8228-2520
According to our database1,
Toru Tanzawa
authored at least 41 papers
between 1997 and 2022.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2016, "For contributions to integrated high-voltage circuits".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Antenna / On-Chip-Rectifier Co-Design Methodology for Micro-Watt Microwave Wireless Power Transfer.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021
2020
Int. J. Circuit Theory Appl., 2020
A Design of Cold Start Charge Pump for Flexible Thermoelectric Generator with High Output Impedance.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
Toward a Minimum-Operating-Voltage Design of DC-DC Charge Pump Circuits for Energy Harvesting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Design of Pre-Emphasis Pulses for Large Memory Arrays with Minimal Word-Line Delay Time.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Pre-Emphasis Pulse Generator Insensitive to Process Variation for Driving Large Memory and Panel Display Arrays with Minimal Delay Time.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
A 2V 3.8µW Fully-Integrated Clocked AC-DC Charge Pump with 0.5V 500Ω Vibration Energy Harvester.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
On the Output Impedance and an Output Current-Power Efficiency Relationship of Dickson Charge Pump Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Design Considerations on Power, Performance, Reliability and Yield in 3D NAND Technology.
IEICE Trans. Electron., 2018
2017
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
On-chip switched-capacitor DC-DC converter in memory technology: State of the art and challenges.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
2016
IEICE Trans. Electron., 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Design challenge in 3D NAND technology: A 4.8X area- and 1.3X power-efficient 20V charge pump using tier capacitors.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
A comprehensive optimization methodology for designing charge pump voltage multipliers.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Design of DC-DC switched-capacitor voltage multiplier driven by DC energy transducer.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2012
A Behavior Model of an On-Chip High Voltage Generator for Fast, System-Level Simulation.
IEEE Trans. Very Large Scale Integr. Syst., 2012
2010
A Behavior Model of a Dickson Charge Pump Circuit for Designing a Multiple Charge Pump System Distributed in LSIs.
IEEE Trans. Circuits Syst. II Express Briefs, 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A temperature compensation word-line voltage generator for multi-level cell NAND Flash memories.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2005
A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters.
IEICE Trans. Electron., 2005
2004
A temperature-compensated CMOS LC-VCO enabling the direct modulation architecture in 2.4GHz GFSK transmitter.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2002
A 44-mm<sup>2</sup> four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller.
IEEE J. Solid State Circuits, 2002
High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories.
IEEE J. Solid State Circuits, 2002
IEEE J. Solid State Circuits, 2002
2001
IEEE J. Solid State Circuits, 2001
2000
IEEE J. Solid State Circuits, 2000
1999
IEEE J. Solid State Circuits, 1999
IEEE J. Solid State Circuits, 1999
1998
A multipage cell architecture for high-speed programming multilevel NAND flash memories.
IEEE J. Solid State Circuits, 1998
1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997