Andrea Marchese

Orcid: 0000-0002-2066-3501

According to our database1, Andrea Marchese authored at least 5 papers between 1993 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2019
A Multimaterial Transport Problem and its Convex Relaxation via Rectifiable G-currents.
SIAM J. Math. Anal., 2019

2017
DENA: A DVFS-Capable Heterogeneous NoC Architecture.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2016
Runtime resource management for embedded and HPC systems.
Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, 2016

1994
High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs.
Microprocess. Microprogramming, 1994

1993
High level synthesis through folding of data flow graphs: Optimal intra-node scheduling.
Microprocess. Microprogramming, 1993


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