Fausto Distante

According to our database1, Fausto Distante authored at least 17 papers between 1987 and 1997.

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Bibliography

1997
Array partitioning to achieve defect tolerance.
Proceedings of the 23rd EUROMICRO Conference '97, 1997

Harvesting Through Array Partitioning: A Solution to Achieve Defect Tolerance.
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

1995
A Channel-Constrained Reconfiguration Approach for Processing Arrays.
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995

1994
High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs.
Microprocess. Microprogramming, 1994

1993
A behavioral level tool for design and verification of parallel architectures: PADS.
Microprocess. Microprogramming, 1993

High level synthesis through folding of data flow graphs: Optimal intra-node scheduling.
Microprocess. Microprogramming, 1993

1992
Behavioral Simulation of Array Processors in the APES Environment.
Simul., 1992

1991
Mapping neural nets onto a massively parallel architecture: a defect-tolerance solution.
Proc. IEEE, 1991

DFG: a graph based approach for algorithmic flow driven architecture synthesis.
Microprocessing and Microprogramming, 1991

Behavioral Design, Simulation, and Evaluation of Array Processors: APES Environment.
Int. J. Comput. Simul., 1991

1990
Area compaction in silicon structures for neural net implementation.
Microprocessing and Microprogramming, 1990

APES - Implementation of a CAD tool for array processor design: Textual definition versus graphic description.
Microprocessing and Microprogramming, 1990

1988
Behavioral testing of multilevel system software.
Microprocess. Microprogramming, 1988

Parallel processing: Array processors I.
Microprocess. Microprogramming, 1988

APES: an integrated system for behavioral design, simulation and evaluation of array processors.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

Array partitioning: a methodology for reconfigurability and reconfiguration problems.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1987
Distributed Architecture Design to Match Optimum Process Allocation: A Simulated Annealing Based Approach.
Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS '87), 1987


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