Davide Zoni
Orcid: 0000-0002-9951-062X
According to our database1,
Davide Zoni
authored at least 62 papers
between 2012 and 2024.
Collaborative distances:
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Bibliography
2024
CoRR, 2024
2023
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023
HLS-based acceleration of the BIKE post-quantum KEM on embedded-class heterogeneous SoCs.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Dynamic Power Consumption of the Full Posit Processing Unit: Analysis and Experiments.
Proceedings of the 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2023
Proceedings of the 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2023
Hardware and Software Support for Mixed Precision Computing: a Roadmap for Embedded and HPC Systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach.
Microprocess. Microsystems, November, 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Efficient and Scalable FPGA Design of GF($2^m$2m) Inversion for Post-Quantum Cryptosystems.
IEEE Trans. Computers, 2022
J. Syst. Archit., 2022
Gated-CNN: Combating NBTI and HCI aging effects in on-chip activation memories of Convolutional Neural Network accelerators.
J. Syst. Archit., 2022
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
2021
Sustain. Comput. Informatics Syst., 2021
Automatic identification and hardware implementation of a resource-constrained power model for embedded systems.
Sustain. Comput. Informatics Syst., 2021
TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
All-Digital Control-Theoretic Scheme to Optimize Energy Budget and Allocation in Multi-Cores.
IEEE Trans. Computers, 2020
IEEE Embed. Syst. Lett., 2020
Efficient and Scalable FPGA-Oriented Design of QC-LDPC Bit-Flipping Decoders for Post-Quantum Cryptography.
IEEE Access, 2020
Flexible and Scalable FPGA-Oriented Design of Multipliers for Large Binary Polynomials.
IEEE Access, 2020
VGM-Bench: FPU Benchmark Suite for Computer Vision, Computer Graphics and Machine Learning Applications.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2020
2019
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019
Partial Packet Forwarding to Improve Performance in Fully Adaptive Routing for Cache-Coherent NoCs.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019
Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture.
ACM Trans. Design Autom. Electr. Syst., 2018
DarkCache: Energy-Performance Optimization of Tiled Multi-Cores by Adaptively Power-Gating LLC Banks.
ACM Trans. Archit. Code Optim., 2018
Microprocess. Microsystems, 2018
Exploring manycore architectures for next-generation HPC systems through the MANGO approach.
Microprocess. Microsystems, 2018
Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems, 2017
J. Parallel Distributed Comput., 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the Euromicro Conference on Digital System Design, 2017
2016
A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations.
J. Signal Process. Syst., 2016
IEEE Trans. Parallel Distributed Syst., 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
A control-based methodology for power-performance optimization in NoCs exploiting DVFS.
J. Syst. Archit., 2015
ACM J. Emerg. Technol. Comput. Syst., 2015
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015
2014
Exploring power reliability and performance aspects in on-chip networks for multi-cores.
PhD thesis, 2014
2013
An analytical, dynamic, power-performance router model for run-time NoC optimizations.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Adaptive routing and Dynamic Frequency Scaling for NoC power-performance optimizations.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Proceedings of the 2013 International Symposium on System on Chip, 2013
Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012
A Temperature and Reliability Oriented Simulation Framework for Multi-core Architectures.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the 2012 International Symposium on System on Chip, 2012
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012
A Low-Overhead Heuristic for Mixed Workload Resource Partitioning in Cluster-Based Architectures.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012