Andrew Pan

Orcid: 0000-0001-9666-0254

According to our database1, Andrew Pan authored at least 3 papers between 2014 and 2017.

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Bibliography

2017
Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
An Evaluation Framework for Nanotransfer Printing-Based Feature-Level Heterogeneous Integration in VLSI Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2014
PROCEED: A pareto optimization-based circuit-level evaluator for emerging devices.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014


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