Andrew Richards

According to our database1, Andrew Richards authored at least 18 papers between 2006 and 2018.

Collaborative distances:



In proceedings 
PhD thesis 




TensorFlow Acceleration on ARM Hikey Board.
Proceedings of the International Workshop on OpenCL, 2018

The LPGPU2 Project: Low-Power Parallel Computing on GPUs: Extended Abstract.
Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017

Accelerated Machine Learning Using TensorFlow and SYCL on OpenCL Devices.
Proceedings of the 5th International Workshop on OpenCL, 2017

Enabling GPU software developers to optimize their applications - The LPGPU2 approach.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

Working together to build the heterogeneous processing ecosystem.
Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit, 2016

Update on the SYCL for OpenCL open standard to enable C++ meta programming on top of OpenCL.
Proceedings of the 3rd International Workshop on OpenCL, 2015

Programmability and performance portability aspects of heterogeneous multi-/manycore systems.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

The impact of diverse memory architectures on multicore consumer software: an industrial perspective from the video games domain.
Proceedings of the 2011 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with PLDI '11, 2011

The PEPPHER Approach to Programmability and Performance Portability for Heterogeneous many-core Architectures.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

On Sums of Conditionally Independent Subexponential Random Variables.
Math. Oper. Res., 2010

Offload - Automating Code Migration to Heterogeneous Multicore Systems.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

Programming Heterogeneous Multicore Systems Using Threading Building Blocks.
Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010

Mainstream Parallel Array Programming on Cell.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2010

Automatic Offloading of C++ for the Cell BE Processor: A Case Study Using Offload.
Proceedings of the CISIS 2010, 2010

On upper bounds for the tail distribution of geometric sums of subexponential random variables.
Queueing Syst., 2009

Shibboleth Access for Resources on the National Grid Service (SARoNGS).
Proceedings of the Fifth International Conference on Information Assurance and Security, 2009

Delayed Side-Effects Ease Multi-core Programming.
Proceedings of the Euro-Par 2007, 2007

ShibGrid: Shibboleth Access for the UK National Grid Service.
Proceedings of the Second International Conference on e-Science and Grid Technologies (e-Science 2006), 2006