Anton Lokhmotov

According to our database1, Anton Lokhmotov authored at least 29 papers between 2007 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
On the Anatomy of Predictive Models for Accelerating GPU Convolution Kernels and Beyond.
ACM Trans. Archit. Code Optim., 2021

Dynamic Network Selection for the Object Detection Task: Why It Matters and What We (Didn't) Achieve.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

2020
Benchmarking TinyML Systems: Challenges and Direction.
CoRR, 2020


2018
A model-driven approach for a new generation of adaptive libraries.
CoRR, 2018

A Collective Knowledge workflow for collaborative research into multi-objective autotuning and machine learning techniques.
CoRR, 2018

Introducing ReQuEST: an Open Platform for Reproducible and Quality-Efficient Systems-ML Tournaments.
CoRR, 2018

Multi-objective autotuning of MobileNets across the full software/hardware stack.
Proceedings of the 1st on Reproducible Quality-Efficient Systems Tournament on Co-designing Pareto-efficient Deep Learning, 2018

2016
Benchmarking, autotuning and crowdtuning OpenCL programs using the Collective Knowledge framework.
Proceedings of the 4th International Workshop on OpenCL, 2016

Optimizing convolutional neural networks on embedded platforms with OpenCL.
Proceedings of the 4th International Workshop on OpenCL, 2016

Collective Knowledge: Towards R&D sustainability.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
GEMMbench: a framework for reproducible and collaborative benchmarking of matrix multiplication.
CoRR, 2015

Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015).
CoRR, 2015

Collective Mind, Part II: Towards Performance- and Cost-Aware Software Engineering as a Natural Science.
CoRR, 2015

PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
Collective mind: Towards practical and collaborative auto-tuning.
Sci. Program., 2014

VOBLA: a vehicle for optimized basic linear algebra.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014

2013
PENCIL: Towards a Platform-Neutral Compute Intermediate Language for DSLs
CoRR, 2013

2011
Automatically generating and tuning GPU code for sparse matrix-vector multiplication from a high-level representation.
Proceedings of 4th Workshop on General Purpose Processing on Graphics Processing Units, 2011

2010
Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

Generating GPU Code from a High-Level Representation for Image Processing Kernels.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2010

2009
Deriving Efficient Data Movement from Decoupled Access/Execute Specifications.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

Towards Metaprogramming for Parallel Systems on a Chip.
Proceedings of the Euro-Par 2009, 2009

2008
Programming and compiling for embedded SIMD architectures.
PhD thesis, 2008

Compile-Time and Run-Time Issues in an Auto-Parallelisation System for the Cell BE Processor.
Proceedings of the Euro-Par 2008 Workshops, 2008

2007
Optimal bit-reversal using vector permutations.
Proceedings of the SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2007

Revisiting SIMD Programming.
Proceedings of the Languages and Compilers for Parallel Computing, 2007

Delayed Side-Effects Ease Multi-core Programming.
Proceedings of the Euro-Par 2007, 2007

Auto-parallelisation of Sieve C++ Programs.
Proceedings of the Euro-Par 2007 Workshops: Parallel Processing, 2007


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