Aravinth Subramaniam

Orcid: 0000-0003-1982-0108

According to our database1, Aravinth Subramaniam authored at least 4 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

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Bibliography

2021
Computational Feasibility of Multi-objective Optimal Design Techniques for Grid-Connected Multi-cell Solid-State-Transformers.
Proceedings of the IECON 2021, 2021

2020
A Survey of Failure Mechanisms and Statistics for Critical Electrical Equipment in Buildings.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

2015
A 14 nm SoC platform technology featuring 2<sup>nd</sup> generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um<sup>2</sup> SRAM cells, optimized for low power, high performance and high density SoC products.
Proceedings of the Symposium on VLSI Circuits, 2015

Thermal prognosis of dry-type transformer: Simulation study on load and ambient temperature impacts.
Proceedings of the IECON 2015, 2015


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