Chetan Prasad

According to our database, Chetan Prasad authored at least 8 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance Computing.

Walid M. Hafez, P. Agnihotri, M. Asoro, M. Aykol, B. Bains, R. Bambery, M. Bapna, A. Barik, A. Chatterjee, P. C. Chiu, T. Chu, C. Firby, K. Fischer, M. Fradkin, Hannes Greve, A. Gupta, E. Haralson, M. Haran, Jeffery Hicks, A. Illa, M. Jang, S. Klopcic, M. Kobrinsky, B. Kuns, H.-h. Lai, G. Lanni, S.-H. Lee, N. Lindert, C.-l. Lo, Y. Luo, G. Malyavanatham, B. Marinkovic, Y. Maymon, M. Nabors, J. Neirynck, P. Packan, A. Paliwal, L. Pantisano, Leif Paulson, Padma Penmatsa, Chetan Prasad, Conor Puls, T. Rahman, R. Ramaswamy, S. Samant, Bernhard Sell, K. Sethi, F. Shah, M. Shamanna, K. Shang, Q. Li, M. Sibakoti, J. Stoeger, N. Strutt, R. Thirugnanasambandam, C. Tsai, X. Wang, A. Wang, S.-j. Wu, Q. Xu, X.-h. Zhong, S. Natarajan

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Reliability Studies on Advanced FinFET Transistors of the Intel 4 CMOS Technology.

M. Jamil, S. Mukhopadhay, M. Ghoneim, A. Shailos, Chetan Prasad, Inanc Meric, Stephen Ramey

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022

Intel 4 CMOS Technology Featuring Advanced FinFET Transistors optimized for High Density and High-Performance Computing.

Bernhard Sell, S. An, J. Armstrong, D. Bahr, B. Bains, R. Bambery, K. Bang, D. Basu, S. Bendapudi, D. Bergstrom, R. Bhandavat, S. Bhowmick, M. Buehler, D. Caselli, S. Cekli, Vrsk. Chaganti, Y. J. Chang, K. Chikkadi, T. Chu, T. Crimmins, G. Darby, C. Ege, P. Elfick, Tyler Elko-Hansen, S. Fang, C. Gaddam, M. Ghoneim, H. Gomez, S. Govindaraju, Z. Guo, Walid M. Hafez, M. Haran, M. Hattendorf, S. Hu, A. Jain, S. Jaloviar, M. Jang, J. Kameswaran, V. Kapinus, A. Kennedy, S. Klopcic, D. Krishnan, J. Leib, Y.-T. Lin, N. Lindert, G. Liu, O. Loh, Y. Luo, S. Mani, M. Mleczko, S. Mocherla, P. Packan, M. Paik, A. Paliwal, R. Pandey, K. Patankar, L. Pipes, P. Plekhanov, Chetan Prasad, M. Prince, G. Ramalingam, R. Ramaswamy, J. Riley, J. R. Sanchez Perez, Justin Sandford, A. Sathe, F. Shah, H. Shim, S. Subramanian, S. Tandon, M. Tanniru, D. Thakurta, T. Troeger, X. Wang, C. Ward, A. Welsh, S. Wickramaratne, J. Wnuk, S. Q. Xu, P. Yashar, J. Yaung, K. Yoon, N. Young

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020

Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking.

Chetan Prasad, Sunny Chugh, Hannes Greve, I-chen Ho, Enamul Kabir, Cheyun Lin, Mahjabin Maksud, Steven R. Novak, Benjamin Orr, Keun Woo Park, Anthony Schmitz, Zhizheng Zhang, Peng Bai, Doug B. Ingerly, Emre Armagan, Hsinwei Wu, Patrick N. Stover, Lance Hibbeler, Michael O'Day, Daniel Pantuso

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2018

Technology scaling implications for BTI reliability.

Stephen M. Ramey, Chetan Prasad, A. Rahman

Microelectron. Reliab., 2018

2015

A 14 nm SoC platform technology featuring 2^nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um² SRAM cells, optimized for low power, high performance and high density SoC products.

Chia-Hong Jan, F. Al-amoody, H.-Y. Chang, T. Chang, Y.-W. Chen, N. Dias, Walid M. Hafez, Doug B. Ingerly, M. Jang, Eric Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, Chetan Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, Aravinth Subramaniam, C. Tsai, Peter Vandervoorn, L. Yang, A. Zainuddin, Peng Bai

Proceedings of the Symposium on VLSI Circuits, 2015

Transistor reliability variation correlation to threshold voltage.

Stephen Ramey, M. Chahal, P. Nayak, Steven R. Novak, Chetan Prasad, Jeffery Hicks

Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014

Advanced CMOS reliability challenges.

Chetan Prasad

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014