Aritra Bhattacharyay

According to our database1, Aritra Bhattacharyay authored at least 7 papers between 2019 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
Equating Inv-Quinv formulas for the $q$-Whittaker and modified Hall-Littlewood functions.
Electron. J. Comb., 2025

2024
Trimming The Fat: A Minimum-Security Architecture for Protecting SoC Designs Against Supply Chain Threats.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
An Automated Framework for Board-Level Trojan Benchmarking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

2022
VIPR-PCB: a machine learning based golden-free PCB assurance framework.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2020
An Automated Framework for Board-level Trojan Benchmarking.
CoRR, 2020

2019
Automated Defective Pin Detection for Recycled Microelectronics Identification.
J. Hardw. Syst. Secur., 2019

Deep Learning based Model Building Attacks on Arbiter PUF Compositions.
IACR Cryptol. ePrint Arch., 2019


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