Arturo Sarmiento-Reyes
Orcid: 0000-0002-7619-4994
According to our database1,
Arturo Sarmiento-Reyes
authored at least 54 papers
between 1994 and 2023.
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Bibliography
2023
Proceedings of the 20th International Conference on Electrical Engineering, 2023
Proceedings of the 20th International Conference on Electrical Engineering, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2021
Proceedings of the 18th International Conference on Electrical Engineering, 2021
2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
2018
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
Proceedings of the 15th International Conference on Electrical Engineering, 2018
2017
Extension of Laplace transform-homotopy perturbation method to solve nonlinear differential equations with variable coefficients defined with Robin boundary conditions.
Neural Comput. Appl., 2017
A Novel Modeling Methodology for Memristive Systems Using Homotopy Perturbation Methods.
Circuits Syst. Signal Process., 2017
Proceedings of the 14th International Conference on Electrical Engineering, 2017
Proceedings of the 14th International Conference on Electrical Engineering, 2017
2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
An Homotopy Path Planning Method with automatic fixed value assignation of repulsion parameter for mobile robotics.
Proceedings of the 13th International Conference on Electrical Engineering, 2016
2015
Nonlinearities Distribution Homotopy Perturbation Method Applied to Solve Nonlinear Problems: Thomas-Fermi Equation as a Case Study.
J. Appl. Math., 2015
A Family of Memristive-Transfer Functions of Negative-Feedback Nullor-Based Amplifiers.
Circuits Syst. Signal Process., 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Modified Reduced Differential Transform Method for Partial Differential-Algebraic Equations.
J. Appl. Math., 2014
A fully symbolic homotopy-based memristor model for applications to circuit simulation.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
2013
2012
J. Appl. Math., 2012
2011
IEICE Electron. Express, 2011
2010
J. Softw. Eng. Appl., 2010
2009
The Reduction of the Duration of the Transient Response in a Class of Continuous-Time LTV Filters.
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
Tunable transimpedance amplifiers with constant bandwidth for optical communications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Finding all the operating points in piecewise-linear electrical networks: An iterative-decomposed approach.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
Int. J. Circuit Theory Appl., 2007
FFinder: A MAPLE-based CAD frame for identifying feedback loops in electric circuits.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Applying an iterative-decomposed piecewise-linear model to find multiple operating points.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
The Analytic Determination of the PPV for Second-Order Oscillators Via Time-Varying Eigenvalues.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2003
Topological Considerations for the Diagnosability Conditions of Analogue Circuits Using a Pair of Conjugate Trees.
J. Electron. Test., 2003
2002
Determination of voltage source values in modern biasing techniques of analog circuits.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
INTER: a graph tool for the smart placement of bias sources in negative feed-back amplifiers.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
Topological Considerations for the Diagnosability Conditions of Analogue CircuitsUsing a Pair of Conjugate Trees.
Proceedings of the 2nd Latin American Test Workshop, 2001
A topological approach for determining the uniqueness of the DC solutions in MOS-transistor circuits.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
Matrix-based search of a pair of compatible i-v orientations for the uniqueness analysis of nonlinear resistive circuits.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
An optimal reordering schema of homotopy equations for the analysis of nonlinear resistive circuits.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
1999
An Efficient Method for Narrowband FIR Filter Design.
Computación y Sistemas, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
A Graph-Oriented CAD Tool for Establishing the Topological Diagnostic Conditions of Analogue Circuits.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1995
A Novel Method to Predict Both, the Upper Bound on the Number and the Stability of DC Operating Points of Transistor Circuits.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
A Partitioning-based Method to Determine the Uniqueness of the DC Operating Points of Transistor Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994