Arun Krishnamachary

According to our database, Arun Krishnamachary authored at least 7 papers between 1999 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Path coverage based functional test generation for processor marginality validation.

Suriyaprakash Natarajan, Arun Krishnamachary, Eli Chiprout, Rajesh Galivanche

Proceedings of the 2011 IEEE International Test Conference, 2010

2008

Case Study on Speed Failure Causes in a Microprocessor.

Kip Killpack, Suriyaprakash Natarajan, Arun Krishnamachary, Pouria Bastani

IEEE Des. Test Comput., 2008

2003

Effects of Multi-cycle Sensitization on Delay Tests.

Arun Krishnamachary, Jacob A. Abraham

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2002

Test generation for resistive opens in CMOS.

Arun Krishnamachary, Jacob A. Abraham

Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002

A Comprehensive Fault Model for Deep Submicron Digital Circuits.

Jacob A. Abraham, Arun Krishnamachary, Raghuram S. Tupuri

Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2001

Timing Verification and Delay Test Generation for Hierarchical Designs.

Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

1999

Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor.

Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. Abraham

Proceedings of the 36th Conference on Design Automation, 1999