Ashay Rane

According to our database, Ashay Rane authored at least 12 papers between 2011 and 2020.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2020

Think Fast: A Tensor Streaming Processor (TSP) for Accelerating Deep Learning Workloads.

Dennis Abts, Jonathan Ross, Jonathan Sparling, Mark Wong-VanHaren, Max Baker, Tom Hawkins, Andrew Bell, John Thompson, Temesghen Kahsai, Garrin Kimmell, Jennifer Hwang, Rebekah Leslie-Hurd, Michael Bye, E. R. Creswick, Matthew Boyd, Mahitha Venigalla, Evan Laforge, Jon Purdy, Purushotham Kamath, Dinesh Maheshwari, Michael Beidler, Geert Rosseel, Omar Ahmad, Gleb Gagarin, Richard Czekalski, Ashay Rane, Sahil Parmar, Jeff Werner, Jim Sproch, Adrian Macias, Brian Kurtz

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2018

MicroStache: A Lightweight Execution Context for In-Process Safe Region Isolation.

Lucian Mogosanu, Ashay Rane, Nathan Dautenhahn

Proceedings of the Research in Attacks, Intrusions, and Defenses, 2018

2017

Vale: Verifying High-Performance Cryptographic Assembly Code.

Barry Bond, Chris Hawblitzel, Manos Kapritsos, K. Rustan M. Leino, Jacob R. Lorch, Bryan Parno, Ashay Rane, Srinath T. V. Setty, Laure Thompson

Proceedings of the 26th USENIX Security Symposium, 2017

Everest: Towards a Verified, Drop-in Replacement of HTTPS.

Karthikeyan Bhargavan, Barry Bond, Antoine Delignat-Lavaud, Cédric Fournet, Chris Hawblitzel, Catalin Hritcu, Samin Ishtiaq, Markulf Kohlweiss, K. Rustan M. Leino, Jay R. Lorch, Kenji Maillard, Jianyang Pan, Bryan Parno, Jonathan Protzenko, Tahina Ramananandro, Ashay Rane, Aseem Rastogi, Nikhil Swamy, Laure Thompson, Peng Wang, Santiago Zanella Béguelin, Jean Karim Zinzindohoue

Proceedings of the 2nd Summit on Advances in Programming Languages, 2017

2016

Secure, Precise, and Fast Floating-Point Operations on x86 Processors.

Ashay Rane, Calvin Lin, Mohit Tiwari

Proceedings of the 25th USENIX Security Symposium, 2016

2015

Raccoon: Closing Digital Side-Channels through Obfuscated Execution.

Ashay Rane, Calvin Lin, Mohit Tiwari

Proceedings of the 24th USENIX Security Symposium, 2015

2014

Enhancing Performance Optimization of Multicore/Multichip Nodes with Data Structure Metrics.

Ashay Rane, James C. Browne

ACM Trans. Parallel Comput., 2014

Unification of Static and Dynamic Analyses to Enable Vectorization.

Ashay Rane, Rakesh Krishnaiyer, Chris J. Newburn, James C. Browne, Leonardo Fialho, Zakhar Matveev

Proceedings of the Languages and Compilers for Parallel Computing, 2014

2012

A systematic process for efficient execution on Intel's heterogeneous computation nodes.

Ashay Rane, James C. Browne, Lars Koesterke

Proceedings of the 1st Conference of the Extreme Science and Engineering Discovery Environment, 2012

Enhancing performance optimization of multicore chips and multichip nodes with data structure metrics.

Ashay Rane, James C. Browne

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Poster: determining code segments that can benefit from execution on GPUs.

Ashay Rane, Saurabh Sardeshpande, James C. Browne

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, 2011

Performance Optimization of Data Structures Using Memory Access Characterization.

Ashay Rane, James C. Browne

Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011