Mohit Tiwari

Orcid: 0000-0003-1836-3451

According to our database1, Mohit Tiwari authored at least 78 papers between 2008 and 2024.

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Bibliography

2024
Leveraging AI Planning For Detecting Cloud Security Vulnerabilities.
CoRR, 2024

2023
Sidecars on the Central Lane: Impact of Network Proxies on Microservices.
CoRR, 2023

Greybox Penetration Testing on Cloud Access Control with IAM Modeling and Deep Reinforcement Learning.
CoRR, 2023

Fixing Privilege Escalations in Cloud Access Control with MaxSAT and Graph Neural Networks.
Proceedings of the 38th IEEE/ACM International Conference on Automated Software Engineering, 2023

Enhancing IoT Security Through AI-Based Anomaly Detection and Intrusion Prevention.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

Application of Soft Computing Techniques for Predictive Analytics in Financial Markets.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

Enhancing Image Quality through Deep Learning-based Super-Resolution Techniques.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

Cognitive Defense Cyber Attack Prediction and Security Design in Machine Learning Model.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

Design and Implementation of Block Chain with Cybersecurity Scheme for Fog Based Internet of Things.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

The Empirical Analysis of Machine Learning-Based Techniques for Improving Cyber Security.
Proceedings of the 6th International Conference on Contemporary Computing and Informatics, 2023

2022
LCIPA: Lightweight clustering protocol for industry 4.0 enabled precision agriculture.
Microprocess. Microsystems, October, 2022

Power-based Attacks on Spatial DNN Accelerators.
ACM J. Emerg. Technol. Comput. Syst., 2022

Revisiting Browser Performance Benchmarking From an Architectural Perspective.
IEEE Comput. Archit. Lett., 2022

Using Constraint Programming and Graph Representation Learning for Generating Interpretable Cloud Security Policies.
Proceedings of the Thirty-First International Joint Conference on Artificial Intelligence, 2022

A Comparative Study of Cyber Security Awareness, Competence and Behavior.
Proceedings of the 5th International Conference on Contemporary Computing and Informatics, 2022

A Framework of Artificial Intelligence for the Manufacturing and Image Classification system.
Proceedings of the 5th International Conference on Contemporary Computing and Informatics, 2022

Loan Eligibility Prediction using Machine Learning based on Personal Information.
Proceedings of the 5th International Conference on Contemporary Computing and Informatics, 2022

Analysis of blockchain technology based on digital management systems and data mining technology.
Proceedings of the 5th International Conference on Contemporary Computing and Informatics, 2022

Back to the future: N-Versioning of Microservices.
Proceedings of the 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2022

2021
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols.
ACM Trans. Embed. Comput. Syst., 2021

Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses.
ACM J. Emerg. Technol. Comput. Syst., 2021

NeuroComb: Improving SAT Solving with Graph Neural Networks.
CoRR, 2021

Bandwidth Utilization Side-Channel on ML Inference Accelerators.
CoRR, 2021

Challenges in cybersecurity: Lessons from biological defense systems.
CoRR, 2021

An image quality enhancement scheme employing adolescent identity search algorithm in the NSST domain for multimodal medical image fusion.
Biomed. Signal Process. Control., 2021

ACHyb: a hybrid analysis approach to detect kernel access control vulnerabilities.
Proceedings of the ESEC/FSE '21: 29th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021

Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

2020
Emotion Detection using Image Processing in Python.
CoRR, 2020

SESAME: Software defined Enclaves to Secure Inference Accelerators with Multi-tenant Execution.
CoRR, 2020

2019
Secure Architectures.
IEEE Micro, 2019

Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

ρ: Relaxed Hierarchical ORAM.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018
Power to peep-all: Inference Attacks by Malicious Batteries on Mobile Devices.
Proc. Priv. Enhancing Technol., 2018

The Shape of Alerts: Detecting Malware Using Distributed Detectors by Robustly Amplifying Transient Correlations.
CoRR, 2018

Vulnerability-tolerant secure architectures.
Proceedings of the International Conference on Computer-Aided Design, 2018

Secure DIMM: Moving ORAM Primitives Closer to Memory.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Horizontal side-channel vulnerabilities of post-quantum key exchange protocols.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Binary Ring-LWE hardware with power side-channel countermeasures.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

DATS - Data Containers for Web Applications.
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

2017
Exploiting Latent Attack Semantics for Intelligent Malware Detection.
CoRR, 2017

2016
On Architectural Support for Systems Security.
IEEE Micro, 2016

EMMA: A New Platform to Evaluate Hardware-based Mobile Malware Analyses.
CoRR, 2016

Secure, Precise, and Fast Floating-Point Operations on x86 Processors.
Proceedings of the 25th USENIX Security Symposium, 2016

Quantifying and improving the efficiency of hardware-based mobile malware detectors.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Invited - Who is the major threat to tomorrow's security?: you, the hardware designer.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Raccoon: Closing Digital Side-Channels through Obfuscated Execution.
Proceedings of the 24th USENIX Security Symposium, 2015

Avoiding information leakage in the memory controller with fixed service policies.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Understanding contention-based channels and using them for defense.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
Gate-Level Information Flow Tracking for Security Lattices.
ACM Trans. Design Autom. Electr. Syst., 2014

Morpheus: benchmarking computational diversity in mobile malware.
Proceedings of the HASP 2014, 2014

Memory bandwidth reservation in the cloud to avoid information leakage in the memory controller.
Proceedings of the HASP 2014, 2014

Sapper: a language for hardware-level security policy enforcement.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

2013
Position paper: Sapper - a language for provable hardware policy enforcement.
Proceedings of the 2013 ACM SIGPLAN Workshop on Programming Languages and Analysis for Security, 2013

PHANTOM: practical oblivious computation in a secure processor.
Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

2012
On the Complexity of Generating Gate Level Information Flow Tracking Logic.
IEEE Trans. Inf. Forensics Secur., 2012

Dataflow Tomography: Information Flow Tracking For Understanding and Visualizing Full Systems.
ACM Trans. Archit. Code Optim., 2012

Opportunities and Challenges of Using Plasmonic Components in Nanophotonic Architectures.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Context-centric Security.
Proceedings of the 7th USENIX Workshop on Hot Topics in Security, 2012

Language without words: A pointillist model for natural language processing.
Proceedings of the 6th International Conference on Soft Computing and Intelligent Systems (SCIS), 2012

2011
Theoretical Fundamentals of Gate Level Information Flow Tracking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Caisson: a hardware description language for secure information flow.
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011

Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Fighting fire with fire: modeling the datacenter-scale effects of targeted superlattice thermal management.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Information flow isolation in I2C and USB.
Proceedings of the 48th Design Automation Conference, 2011

2010
Gate-Level Information-Flow Tracking for Secure Architectures.
IEEE Micro, 2010

Secure information flow analysis for hardware design: using the right abstraction for the job.
Proceedings of the 2010 Workshop on Programming Languages and Analysis for Security, 2010

Theoretical analysis of gate level information flow tracking.
Proceedings of the 47th Design Automation Conference, 2010

Hardware trust implications of 3-D integration.
Proceedings of the 5th Workshop on Embedded Systems Security, 2010

Function flattening for lease-based, information-leak-free systems.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

Hardware assistance for trustworthy systems through 3-D integration.
Proceedings of the Twenty-Sixth Annual Computer Security Applications Conference, 2010

2009
Execution leases: a hardware-supported mechanism for enforcing strong non-interference.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Complete information flow tracking from the gates up.
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009

Quantifying the Potential of Program Analysis Peripherals.
Proceedings of the PACT 2009, 2009

2008
A small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008


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