Asier Larrucea

According to our database, Asier Larrucea authored at least 13 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Development and certification of dependable mixed-criticality embedded systems (Entwicklung und Zertifizierung von zuverlässigen eingebetteten Mixed-Criticality-Systemen)

Asier Larrucea

PhD thesis, 2017

Reusable generic design patterns for mixed-criticality systems based on DREAMS.

Asier Larrucea, Imanol Martinez, Vicent Brocal, Hamidreza Ahmadian, Salvador Peiró, Roman Obermaisser, Jon Pérez-Cerrolaza

Microprocess. Microsystems, 2017

GSN Support of Mixed-Criticality Systems Certification.

Carlos Fernando Nicolás, Fernando Eizaguirre, Asier Larrucea, Simon Barner, Franck Chauvel, Goiuria Sagardui, Jon Pérez

Proceedings of the Computer Safety, Reliability, and Security, 2017

Modular Development and Certification of Dependable Mixed-Criticality Systems.

Asier Larrucea, Imanol Martinez, Carlos Fernando Nicolás, Jon Pérez, Roman Obermaisser

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore.

Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the Computer Safety, Reliability, and Security, 2016

A Realistic Approach to a Network-on-Chip Cross-Domain Pattern.

Asier Larrucea, Hamidreza Ahmadian, Roman Obermaisser, Jon Pérez, Carlos Fernando Nicolás

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015

Temporal independence validation of an IEC-61508 compliant mixed-criticality system based on multicore partitioning.

Asier Larrucea, Irune Agirre, Carlos Fernando Nicolás, Jon Pérez, Mikel Azkarate-askasua, Ton Trapman

Proceedings of the 2015 Forum on Specification and Design Languages, 2015

A Modular Safety Case for an IEC-61508 Compliant Generic Hypervisor.

Asier Larrucea, Jon Pérez, Irune Agirre, Vicent Brocal, Roman Obermaisser

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

A Modular Safety Case for an IEC 61508 Compliant Generic COTS Processor.

Asier Larrucea, Jon Pérez, Roman Obermaisser

Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

A Safety Concept for a Railway Mixed-Criticality Embedded System Based on Multicore Partitioning.

Irune Agirre, Mikel Azkarate-askasua, Asier Larrucea, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla

Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

2014

A Simulated Fault Injection Framework for Time-Triggered Safety-Critical Embedded Systems.

Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner

Proceedings of the Computer Safety, Reliability, and Security, 2014

Modeling and Simulated Fault Injection for Time-Triggered Safety-Critical Embedded Systems.

Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner

Proceedings of the 17th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2014

A novel modeling framework for time-triggered safety-critical embedded systems.

Iban Ayestaran, Carlos Fernando Nicolás, Jon Pérez, Asier Larrucea, Peter P. Puschner

Proceedings of the 2014 Forum on Specification and Design Languages, 2014