B. Naresh Kumar Reddy

According to our database, B. Naresh Kumar Reddy authored at least 40 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Developing an adaptive active sleep energy efficient method in heterogeneous wireless sensor network.

M. Sree Chandana, K. Raghava Rao, B. Naresh Kumar Reddy

Multim. Tools Appl., February, 2024

Classification of non-small cell lung cancers using deep convolutional neural networks.

Shaik Ummay Atiya, N. V. K. Ramesh, B. Naresh Kumar Reddy

Multim. Tools Appl., February, 2024

Optimizing Task Scheduling in Multi-thread Real-Time Systems using Augmented Particle Swarm Optimization.

B. Naresh Kumar Reddy, Y. Charan Krishna, P. Naga Satya Nitish, Sitadevi Bharatula

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

Using advanced distributed energy efficient clustering increasing the network lifetime in wireless sensor networks.

K. Raghava Rao, B. Naresh Kumar Reddy, Aruru Sai Kumar

Soft Comput., October, 2023

Bat Optimization Model for Electric Vehicle Route Optimization Under Time-of-Use Electricity Pricing.

B. Veena Vani, Dharavath Kishan, Md. Waseem Ahmad, B. Naresh Kumar Reddy

Wirel. Pers. Commun., August, 2023

An Efficient Real-Time Embedded Application Mapping for NoC Based Multiprocessor System on Chip.

Aruru Sai Kumar, B. Naresh Kumar Reddy

Wirel. Pers. Commun., February, 2023

Accelerating Sorting Performance on FPGA: Combining Quick Sort and Heap Sort through Hybrid Pipelining.

B. Naresh Kumar Reddy, K. Sarangam, Sushmita Dandeliya, S. Pavan Sai Naidu, Naveen Kumar P

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

An Efficient Smart Gas Detecting System using MQ9 Sensor.

B. Naresh Kumar Reddy, Tharakeshwar Appala, B. Veena Vani

Proceedings of the 14th International Conference on Computing Communication and Networking Technologies, 2023

2022

An FPGA and ASIC Implementation of Cubing Architecture.

B. Naresh Kumar Reddy, B. Seetharamulu, G. Siva Krishna, B. Veena Vani

Wirel. Pers. Commun., 2022

Performance and communication energy constrained embedded benchmark for fault tolerant core mapping onto NoC architectures.

Aruru Sai Kumar, T. V. K. Hanumantha Rao, B. Naresh Kumar Reddy

Int. J. Ad Hoc Ubiquitous Comput., 2022

Performance evaluation of modified mesh-based NoC architecture.

B. Naresh Kumar Reddy, Subrat Kar

Comput. Electr. Eng., 2022

Fault-Tolerant Core Mapping for NoC based architectures with improved Performance and Energy Efficiency.

B. Naresh Kumar Reddy, Alex James, Aruru Sai Kumar

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Hardware Implementation of an efficient FIR filter for ECG Signal Denoising Application.

Ajaydas. U. R, B. Naresh Kumar Reddy, Alex James

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021

Machine Learning Techniques for the Prediction of NoC Core Mapping Performance.

B. Naresh Kumar Reddy, Subrat Kar

Proceedings of the 26th IEEE Pacific Rim International Symposium on Dependable Computing, 2021

An Efficient Application Core Mapping Algorithm for Wireless Network-an-Chip.

B. Naresh Kumar Reddy, Subrat Kar

Proceedings of the 26th IEEE Pacific Rim International Symposium on Dependable Computing, 2021

Identification of Tomato Crop Diseases Using Neural Networks-CNN.

N. V. K. Ramesh, Mohanpradeep Reddy B, Bhavya Deepika B, N. Suresh, K. Raghava Rao, B. Naresh Kumar Reddy

Proceedings of the 12th International Conference on Computing Communication and Networking Technologies, 2021

Energy Efficient and High Performance Modified Mesh based 2-D NoC Architecture.

B. Naresh Kumar Reddy, Subrat Kar

Proceedings of the 22nd IEEE International Conference on High Performance Switching and Routing, 2021

2020

A Highly Secured QoS Aware Routing Algorithm for Software Defined Vehicle Ad-Hoc Networks Using Optimal Trust Management Scheme.

Shakeel Ahmed, N. V. K. Ramesh, B. Naresh Kumar Reddy

Wirel. Pers. Commun., 2020

An efficient design and implementation of Vedic multiplier in quantum-dot cellular automata.

B. Naresh Kumar Reddy, B. Veena Vani, G. Bhavya Lahari

Telecommun. Syst., 2020

Deep Learning for Sentiment Analysis Based on Customer Reviews.

B. Seetharamulu, B. Naresh Kumar Reddy, K. Bramha Naidu

Proceedings of the 11th International Conference on Computing, 2020

A two-stage opamp frequency Compensation technique by splitting the 2^nd stage.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy

Proceedings of the 11th International Conference on Computing, 2020

A Single BJT 10.2 ppm/°C Bandgap Reference in 45nm CMOS Technology.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy

Proceedings of the 11th International Conference on Computing, 2020

2019

Performance constrained multi-application network on chip core mapping.

B. Naresh Kumar Reddy, Dharavath Kishan, B. Veena Vani

Int. J. Speech Technol., 2019

SRAM cell with better read and write stability with Minimum area.

B. Naresh Kumar Reddy, K. Sarangam, T. Veeraiah, Ramalingaswamy Cheruku

Proceedings of the TENCON 2019, 2019

A Bi-Level Cascaded Ensemble Framework for Effective Disease Diagnosis.

Ramalingaswamy Cheruku, Pradeep Kumar Nalluri, Krishna Yogeshwar G. Gopi, J. B. S. Charan, V. Naga Sanketh, Nareshkumar Reddy Beechu

Proceedings of the TENCON 2019, 2019

A High Frequency CMRR improvement technique for Differential Amplifiers in 45nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu

Proceedings of the 10th International Conference on Computing, 2019

A Low Power Miller Compensation Technique for Two Stage Op-amp in 65nm CMOS Technology.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu

Proceedings of the 10th International Conference on Computing, 2019

2018

Energy-Aware and Reliability-Aware Mapping for NoC-Based Architectures.

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra

Wirel. Pers. Commun., 2018

Hardware implementation of fault tolerance NoC core mapping.

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra

Telecommun. Syst., 2018

An energy-efficient fault-aware core mapping in mesh-based network on chip systems.

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra

J. Netw. Comput. Appl., 2018

An Energy-Efficient Core Mapping Algorithm on Network on Chip (NoC).

B. Naresh Kumar Reddy, Sireesha

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

A 31 ppm/° C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the 9th International Conference on Computing, 2018

A Technique to Reduce the Capacitor Size in Two Stage Miller Compensated Opamp.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the 9th International Conference on Computing, 2018

2017

High-performance and energy-efficient fault-tolerance core mapping in NoC.

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra

Sustain. Comput. Informatics Syst., 2017

System level fault-tolerance core mapping and FPGA-based verification of NoC.

Naresh Kumar Reddy Becchu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra

Microelectron. J., 2017

2016

A Gracefully Degrading and Energy-Efficient Fault Tolerant NoC Using Spare Core.

B. Naresh Kumar Reddy, M. H. Vasantha, Kumar Y. B. Nithin

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015

Poster: An Efficient Low Power & High Performance in MPSOC.

K. Jayasree, B. Naresh Kumar Reddy, B. Srinuvasu Kumar, Janjhyam Venkata Naga Ramesh, Pranose J. Edavoor, Mohd Kashif Zia Ansari

Proceedings of the Third International Symposium on Women in Computing and Informatics, 2015

An efficient approach for design and testing of FPGA programming using Lab VIEW.

B. Naresh Kumar Reddy, N. Suresh, Janjhyam Venkata Naga Ramesh, T. Pavithra, Y. Krupa Bahulya, Pranose J. Edavoor, S. Janaki Ram

Proceedings of the 2015 International Conference on Advances in Computing, 2015

2013

An Efficient Online Mileage Indicator by Using Sensors for New Generation Automobiles.

B. Naresh Kumar Reddy, M. Naraimhulu, S. V. Sai Prasad, K. Khaja Babu

Proceedings of the 2013 2nd International Conference on Advanced Computing, 2013