Bahareh Khabbazan

According to our database, Bahareh Khabbazan authored at least 8 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Towards Efficient LUT-based PIM: A Scalable and Low-Power Approach for Modern Workloads.

Bahareh Khabbazan, Marc Riera, Antonio González

CoRR, February, 2025

An energy-efficient near-data processing accelerator for DNNs to optimize memory accesses.

Bahareh Khabbazan, Mohammad Sabri, Marc Riera, Antonio González

J. Syst. Archit., 2025

2023

An Energy-Efficient Near-Data Processing Accelerator for DNNs that Optimizes Data Accesses.

Bahareh Khabbazan, Marc Riera, Antonio González

CoRR, 2023

DNA-TEQ: An Adaptive Exponential Quantization of Tensors for DNN Inference.

Bahareh Khabbazan, Marc Riera, Antonio González

Proceedings of the 30th IEEE International Conference on High Performance Computing, 2023

QeiHaN: An Energy-Efficient DNN Accelerator that Leverages Log Quantization in NDP Architectures.

Bahareh Khabbazan, Marc Riera, Antonio González

Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2021

Area and Power-Efficient Variable-Sized DCT Architecture for HEVC Using Muxed-MCM Problem.

Ahmad Shabani, Mohammad Sabri Abrebekoh, Bahareh Khabbazan, Somayeh Timarchi

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

An Automated Tool for Implementing Deep Neural Networks on FPGA.

Masoud Shahshahani, Mohammad Sabri Abrebekoh, Bahareh Khabbazan, Dinesh Bhatia

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2019

Design and Implementation of a Low-Power, Embedded CNN Accelerator on a Low-end FPGA.

Bahareh Khabbazan, Sattar Mirzakuchaki

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019