Behrooz Parhami
Orcid: 0000-0002-8093-6436Affiliations:
- University of California, Santa Barbara, USA
According to our database1,
Behrooz Parhami
authored at least 162 papers
between 1972 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1997, "For contributions to the design of high-performance digital systems through arithmetic algorithms and highly parallel architectures.".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on ece.ucsb.edu
On csauthors.net:
Bibliography
2024
Proceedings of the 14th IEEE Annual Computing and Communication Workshop and Conference, 2024
2020
Trans. Emerg. Telecommun. Technol., 2020
Comput. Electr. Eng., 2020
Computing with logarithmic number system arithmetic: Implementation methods and performance benefits.
Comput. Electr. Eng., 2020
2019
Proceedings of the Encyclopedia of Big Data Technologies., 2019
Proceedings of the Encyclopedia of Big Data Technologies., 2019
Proceedings of the Encyclopedia of Big Data Technologies., 2019
Proceedings of the Encyclopedia of Big Data Technologies., 2019
Proceedings of the Encyclopedia of Big Data Technologies., 2019
IEEE Trans. Netw. Serv. Manag., 2019
2018
Adapting Computer Arithmetic Structures to Sustainable Supercomputing in Low-Power, Majority-Logic Nanotechnologies.
IEEE Trans. Sustain. Comput., 2018
Symmetric Agency Graphs Facilitate and Improve the Quality of Virtual Network Embedding.
Symmetry, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
2016
A Formulation of Fast Carry Chains Suitable for Efficient Implementation with Majority Elements.
Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016
A theoretical analysis of square versus rectangular component multipliers in recursive multiplication.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
2015
Computer, 2015
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Proceedings of the 2013 Asilomar Conference on Signals, 2013
Proceedings of the 2013 Asilomar Conference on Signals, 2013
Proceedings of the 2013 Asilomar Conference on Signals, 2013
2012
A Class of Data-Center Network Models Offering Symmetry, Scalability, and Reliability.
Parallel Process. Lett., 2012
J. Interconnect. Networks, 2012
Efficient realisation of arithmetic algorithms with weighted collection of posibits and negabits.
IET Comput. Digit. Tech., 2012
2011
On necessary conditions for scale-freedom in complex networks, with applications to computer communication systems.
Int. J. Syst. Sci., 2011
Biswapped networks: a family of interconnection architectures with advantages over swapped or OTIS networks.
Int. J. Comput. Math., 2011
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011
2010
J. Supercomput., 2010
IEEE Trans. Computers, 2010
Inf. Process. Lett., 2010
2009
Swapped (OTIS) Networks Built of Connected Basis Networks Are Maximally Fault Tolerant.
IEEE Trans. Parallel Distributed Syst., 2009
IEEE Trans. Educ., 2009
Efficient Hamming Weight Comparators for Binary Vectors Based on Accumulative and Up/Down Parallel Counters.
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Unified Approach to the Design of Modulo-(2<sup>n</sup> +/- 1) Adders Based on Signed-LSB Representation of Residues.
Proceedings of the 19th IEEE Symposium on Computer Arithmetic, 2009
2008
Comments on "Low Diameter Interconnections for Routing in High-Performance Parallel Systems, " with Connections and Extensions to Arc Coloring of Coset Graphs.
IEEE Trans. Computers, 2008
J. Interconnect. Networks, 2008
On isomorphisms and similarities between generalized Petersen networks and periodically regular chordal rings.
Inf. Process. Lett., 2008
Integr., 2008
Double-least-significant-bits 2's-complement number representation scheme with bitwise complementation and symmetric range.
IET Circuits Devices Syst., 2008
2007
A Group Construction Method with Applications to Deriving Pruned Interconnection Networks.
IEEE Trans. Parallel Distributed Syst., 2007
Structural properties of Cayley digraphs with applications to mesh and pruned torus interconnection networks.
J. Comput. Syst. Sci., 2007
Stored-transfer representations with weighted digit-set encodings for ultrahigh-speed arithmetic.
IET Circuits Devices Syst., 2007
Further mathematical properties of Cayley digraphs applied to hexagonal and honeycomb meshes.
Discret. Appl. Math., 2007
Proceedings of the 8th ACIS International Conference on Software Engineering, 2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the Computational Science - ICCS 2007, 7th International Conference, Beijing, China, May 27, 2007
Proceedings of the Advanced Parallel Processing Technologies, 7th International Symposium, 2007
2006
An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding.
J. VLSI Signal Process., 2006
IEEE Trans. Computers, 2006
Inf. Process. Lett., 2006
Further Properties of Cayley Digraphs and Their Applications to Interconnection Networks.
Proceedings of the Theory and Applications of Models of Computation, 2006
2005
IEEE Trans. Parallel Distributed Syst., 2005
Perfect Difference Networks and Related Interconnection Structures for Parallel and Distributed Systems.
IEEE Trans. Parallel Distributed Syst., 2005
Weighted two-valued digit-set encodings: unifying efficient hardware representation schemes for redundant number systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Swapped interconnection networks: Topological, performance, and robustness attributes.
J. Parallel Distributed Comput., 2005
J. Interconnect. Networks, 2005
The Hamiltonicity of swapped (OTIS) networks built of Hamiltonian component networks.
Inf. Process. Lett., 2005
Some mathematical properties of cayley digraphs with applications to interconnection network design.
Int. J. Comput. Math., 2005
Application of Perfect Difference Sets to the Design of Efficient and Robust Interconnection Networks.
Proceedings of the 2005 International Conference on Communications in Computing, 2005
Chordal Rings Based on Symmetric Odd-Radix Number Systems.
Proceedings of the 2005 International Conference on Communications in Computing, 2005
2004
Comparing four classes of torus-based parallel architectures: Networkparameters and communication performance.
Math. Comput. Model., 2004
J. Parallel Distributed Comput., 2004
Hexagonal and Pruned Torus Networks as Cayley Graphs.
Proceedings of the International Conference on Communications in Computing, 2004
Some Properties of Swapped Interconnection Networks.
Proceedings of the International Conference on Communications in Computing, 2004
2003
Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division.
IEEE Trans. Computers, 2003
Parallel Architectures and Adaptation Algorithms for Programmable FIR Digital Filters With Fully Pipelined Data and Control Flows.
J. Inf. Sci. Eng., 2003
Some Conclusions on Cayley Digraphs and Their Applications to Interconnection Networks.
Proceedings of the Grid and Cooperative Computing, Second International Workshop, 2003
2002
Proceedings of the Encyclopedia of Information Systems, 2002
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002
2001
Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization.
J. VLSI Signal Process., 2001
IEEE Trans. Parallel Distributed Syst., 2001
Approach to component based synthesis of fault tolerant software.
Informatica (Slovenia), 2001
RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
Parallel Algorithms for Index-Permutation Graphs - An Extension of Cayley Graphs for Multiple Chip-Multiprocessors (MCMP).
Proceedings of the 2001 International Conference on Parallel Processing, 2001
2000
Proceedings of the Twelfth annual ACM Symposium on Parallel Algorithms and Architectures, 2000
Extended-Fault Diameter of Mesh Networks.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
Characterization and Generalization of Honeycomb and Diamond Networks.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
Proceedings of the 2000 International Conference on Parallel Processing, 2000
Computer arithmetic - algorithms and hardware designs.
Oxford University Press, ISBN: 978-0-19-512583-2, 2000
1999
IEEE Trans. Parallel Distributed Syst., 1999
Data-Driven Control Scheme for Linear Arrays: Application to a Stable Insertion Sorter.
IEEE Trans. Parallel Distributed Syst., 1999
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999
Routing and Embeddings in Cyclic Petersen Networks: An Efficient Extension of the Petersen Graph.
Proceedings of the International Conference on Parallel Processing 1999, 1999
Proceedings of the International Conference on Parallel Processing 1999, 1999
1998
The Robust-Algorithm Approach to Fault Tolerance on Processor Arrays: Fault Models, Fault Diameter, and Basic Algorithms.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998
Proceedings of the International Conference on Parallel and Distributed Systems, 1998
1997
Microprocess. Microsystems, 1997
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997
A Class of Fixed-Degree Cayley-Graph Interconnection Networks Derived by Pruning k-ary n-cubes.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997
1996
J. VLSI Signal Process., 1996
Comments on "High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits".
IEEE Trans. Computers, 1996
Signal Process., 1996
Parallel Process. Lett., 1996
Extreme-Value Search and General Selection Algorithms for Fully Parallel Associative Memories.
Comput. J., 1996
Recursive hierarchical swapped networks: versatile interconnection architectures for highly parallel systems.
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996
Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996
Cyclic Petersen Networks: Efficient Fixed-Degree Interconnection Networks for Large-Scale Multicomputer System.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996
Numerical Computation on Massively Parallel Processors Based on Residue Number System Arithmetic.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996
Performance Analysis and Optimization of Search and Selection Algorithms for Highly Parallel Associative Memories.
Proceedings of the MASCOTS '96, 1996
Comparing the Performance Parameters of Two Network Structures for Scalable Massively Parallel Processors.
Proceedings of the MASCOTS '96, 1996
Design of reliable software via general combination of N-version programming and acceptance testing.
Proceedings of the Seventh International Symposium on Software Reliability Engineering, 1996
Hierarchical Swapped Networks: Efficient Low-Degree Alternatives to Hypercubes and Generalized Hypercubes.
Proceedings of the 1996 International Symposium on Parallel Architectures, 1996
Swapped networks: unifying the architectures and algorithms of a wide class of hierarchical parallel processors.
Proceedings of the 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), 1996
1995
IEEE Trans. Computers, 1995
The Right Acronym at the Right Time.
Computer, 1995
1994
IEEE Trans. Computers, 1994
Inf. Process. Lett., 1994
1993
IEEE Trans. Signal Process., 1993
Optimal Architectures and Algorithms for Mesh-Connected Parallel Computers with Separable Row/Column Buses.
IEEE Trans. Parallel Distributed Syst., 1993
On the Implementation of Arithmetic Support Functions for Generalized Signed-Digit Number Systems.
IEEE Trans. Computers, 1993
1992
Microprocess. Microprogramming, 1992
Optimal Aspect Ratio and Number of Separable Row/Column Buses for Mesh-Connected Parallel Computers.
Proceedings of the 6th International Parallel Processing Symposium, 1992
Proceedings of the Digest of Papers: FTCS-22, 1992
1991
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
1990
Generalized Signed-Digit Number Systems: A Unifying Framework for Redundant Number Representations.
IEEE Trans. Computers, 1990
Book review: Advanced Research in VLSI, edited by Charles L. Seitz (The MIT Press, Cambridge, MA, 1989, 373 pp.).
SIGARCH Comput. Archit. News, 1990
Proceedings of the Parallel Architectures (Postconference PARBASE-90)., 1990
Systolic Associative Memories.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
1989
The Opposite of Common Sense.
Computer, 1989
1988
IEEE Trans. Computers, 1988
Book review: Memory Storage Patterns in Parallel Processing by Mary A. Mace (Kluwer Academic Publishers, Boston, 1987, 139 pp.).
SIGARCH Comput. Archit. News, 1988
SIGARCH Comput. Archit. News, 1988
1987
IEEE Trans. Computers, 1987
Proceedings of the 8th IEEE Symposium on Computer Arithmetic, 1987
1986
ACM SIGCSE Bull., 1986
1981
1979
1978
IEEE Trans. Computers, 1978
Optically Weighted Dot-Matrix Farsi and Arabic Numerals.
Proceedings of the Information Technology '78: Proceedings of the 3rd Jerusalem Conference on Information Technology (JCIT3), 1978
1977
Computers and the Farsi Language-A Survey of Problem Areas.
Proceedings of the Information Processing, 1977
1976
Proceedings of the American Federation of Information Processing Societies: 1976 National Computer Conference, 1976
1975
Proceedings of seventh international conference on APL, 1975
1974
Proceedings of the American Federation of Information Processing Societies: 1974 National Computer Conference, 1974
1973
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973
1972
IEEE Trans. Computers, 1972
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '72 Fall Joint Computer Conference, December 5-7, 1972, Anaheim, California, USA, 1972