Belgacem Ben Hedia

According to our database, Belgacem Ben Hedia authored at least 14 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

Preface to the VECoS 2020 & 2021 special issue of ISSE.

Kamel Barkaoui, Belgacem Ben Hedia

Innov. Syst. Softw. Eng., March, 2024

2022

Formal modeling and verification for amplification timing anomalies in the superscalar TriCore architecture.

Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan

Int. J. Softw. Tools Technol. Transf., 2022

The Role of Causality in a Formal Definition of Timing Anomalies.

Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan

Proceedings of the 28th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2022

2021

Is This Still Normal? Putting Definitions of Timing Anomalies to the Test.

Benjamin Binder, Mihail Asavoae, Belgacem Ben Hedia, Florian Brandner, Mathieu Jan

Proceedings of the 27th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2021

2020

Scalable Detection of Amplification Timing Anomalies for the Superscalar TriCore Architecture.

Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan

Proceedings of the Formal Methods for Industrial Critical Systems, 2020

2019

Towards Formal Co-validation of Hardware and Software Timing Models of CPSs.

Mihail Asavoae, Imane Haur, Mathieu Jan, Belgacem Ben Hedia, Martin Schoeberl

Proceedings of the Cyber Physical Systems. Model-Based Design - 9th International Workshop, 2019

2018

TT-BIP: using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm.

Hela Guesmi, Belgacem Ben Hedia, Simon Bliudze, Saddek Bensalem, Briag Le Nabec

Innov. Syst. Softw. Eng., 2018

Formal Executable Models for Automatic Detection of Timing Anomalies.

Mihail Asavoae, Belgacem Ben Hedia, Mathieu Jan

Proceedings of the 18th International Workshop on Worst-Case Execution Time Analysis, 2018

QuaRTOS-DSE: A Tool for Design Space Exploration of Embedded Real-Time System.

Briag Le Nabec, Belgacem Ben Hedia, Jean-Philippe Babau

Proceedings of the 21st IEEE International Symposium on Real-Time Distributed Computing, 2018

2016

Towards an Ultra-lightweight Cryptosystem for IoT.

Tasnime Omrani, Layth Sliman, Rabei Becheikh, Safya Belghith, Belgacem Ben Hedia

Proceedings of the Eighth International Conference on Soft Computing and Pattern Recognition, 2016

Poster Abstract: Towards Correct Transformation: From High-Level Models to Time-Triggered Implementations.

Hela Guesmi, Belgacem Ben Hedia, Mathieu Jan, Simon Bliudze, Saddek Bensalem

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Modeling legacy code with BIP: how to reduce the gap between formal description and real-time implementation.

Briag Le Nabec, Belgacem Ben Hedia, Jean-Philippe Babau, Mathieu Jan, Hela Guesmi

Proceedings of the 2016 Forum on Specification and Design Languages, 2016

2015

State Space Reduction Strategie for Model Checking Concurrent C Programs.

Amira Methni, Matthieu Lemerre, Belgacem Ben Hedia, Serge Haddad, Kamel Barkaoui

Proceedings of the 9th Workshop on Verification and Evaluation of Computer and Communication Systems, 2015

2014

Specifying and Verifying Concurrent C Programs with TLA+.

Amira Methni, Matthieu Lemerre, Belgacem Ben Hedia, Serge Haddad, Kamel Barkaoui

Proceedings of the Formal Techniques for Safety-Critical Systems, 2014