Florian Brandner

According to our database1, Florian Brandner authored at least 37 papers between 2006 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Arbitration-Induced Preemption Delays.
Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

2018
Analysis of preemption costs for the stack cache.
Real-Time Systems, 2018

Shedding the Shackles of Time-Division Multiplexing.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

2017
Modeling the energy consumption of programs: Thermal aspects and energy/frequency convexity rule (invited paper).
Proceedings of the 9th International Conference on Wireless Communications and Signal Processing, 2017

Worst-Case Execution Time Analysis of Predicated Architectures.
Proceedings of the 17th International Workshop on Worst-Case Execution Time Analysis, 2017

Experimental energy profiling of energy-critical embedded applications.
Proceedings of the 25th International Conference on Software, 2017

2016
Eager Stack Cache Memory Transfers.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

2015
Efficient context switching for the stack cache: implementation and analysis.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

2014
Criticality: static profiling for real-time programs.
Real-Time Systems, 2014

Refinement of worst-case execution time bounds by graph pruning.
Computer Languages, Systems & Structures, 2014

Lazy Spilling for a Time-Predictable Stack Cache: Implementation and Analysis.
Proceedings of the 14th International Workshop on Worst-Case Execution Time Analysis, 2014

A loosely synchronizing asynchronous router for TDM-scheduled NOCs.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Splitting functions into single-entry regions.
Proceedings of the 2014 International Conference on Compilers, 2014

2013
DSP Instruction Set Simulation.
Proceedings of the Handbook of Signal Processing Systems, 2013

Automatic generation of compiler backends.
Softw., Pract. Exper., 2013

Elimination of parallel copies using code motion on data dependence graphs.
Computer Languages, Systems & Structures, 2013

Static analysis of worst-case stack cache behavior.
Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013

A time-predictable stack cache.
Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

2012
Copy elimination on data dependence graphs.
Proceedings of the ACM Symposium on Applied Computing, 2012

Static routing in symmetric real-time network-on-chips.
Proceedings of the 20th International Conference on Real-Time and Network Systems, 2012

Static profiling of the worst-case in real-time programs.
Proceedings of the 20th International Conference on Real-Time and Network Systems, 2012

A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

2011
Modeling application-specific processors for embedded systems.
Proceedings of the Informatik 2011: Informatik schafft Communities, 2011

Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach.
Proceedings of the Bringing Theory to Practice: Predictability and Performance in Embedded Systems, 2011

Studying optimal spilling in the light of SSA.
Proceedings of the 14th International Conference on Compilers, 2011

A Non-iterative Data-Flow Algorithm for Computing Liveness Sets in Strict SSA Programs.
Proceedings of the Programming Languages and Systems - 9th Asian Symposium, 2011

2010
RTTM: real-time transactional memory.
Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), 2010

SPUR: a trace-based JIT compiler for CIL.
Proceedings of the 25th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2010

Completeness of automatically generated instruction selectors.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

DSP Instruction Set Simulation.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Precise simulation of interrupts using a rollback mechanism.
Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems, 2009

Stack allocation of objects in the CACAO virtual machine.
Proceedings of the 7th International Conference on Principles and Practice of Programming in Java, 2009

Embedded JIT Compilation with CACAO on YARI.
Proceedings of the 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2009

2008
Generalized instruction selection using SSA-graphs.
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008

2007
Leveraging Predicated Execution for Multimedia Processing.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Compiler generation from structural architecture descriptions.
Proceedings of the 2007 International Conference on Compilers, 2007

2006
Effective compiler generation by architecture description.
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006


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