Benjamin J. Blalock

According to our database, Benjamin J. Blalock authored at least 20 papers between 1995 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A High Slew Rate, Low Power, Compact Operational Amplifier Based on the Super-Class AB Recycling Folded Cascode.

Alec Yen, Benjamin J. Blalock

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A Sub-Threshold Low-Power Integrated Bandpass Filter for Highly-Integrated Spectrum Analyzers.

Gavin B. Long, M. Nance Ericson, Charles L. Britton Jr., Benjamin D. Roehrs, Ethan D. Farquhar, S. Shane Frank, Alec Yen, Benjamin J. Blalock

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

Testing and Modeling of a SAR ADC for Cryogenic Applications.

Will Norton, Ziming Wang, Benjamin J. Blalock, Jean Yang-Scharlotta, Miryeong Song, Mohammad Ashtijou, Mohammad M. Mojarradi

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018

Modeling of SOI four-gate transistor (G⁴FET) using multidimensional spline interpolation method.

Md Sakib Hasan, Syed K. Islam, Benjamin J. Blalock

Microelectron. J., 2018

2014

Design and Performance Evaluation of Overcurrent Protection Schemes for Silicon Carbide (SiC) Power MOSFETs.

Zhiqiang Wang, Xiaojie Shi, Yang Xue, Leon M. Tolbert, Fei Wang, Benjamin J. Blalock

IEEE Trans. Ind. Electron., 2014

2012

An ultra-low voltage self-startup charge pump for energy harvesting applications.

Chandradevi Ulaganathan, Benjamin J. Blalock, Jeremy Holleman, Charles L. Britton Jr.

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

A Precision Dose Control Circuit for Maskless E-Beam Lithography With Massively Parallel Vertically Aligned Carbon Nanofibers.

Sazia A. Eliza, Syed Kamrul Islam, Touhidur Rahman, Nora D. Bull, Benjamin J. Blalock, L. R. Baylor, M. Nance Ericson, W. L. Gardner

IEEE Trans. Instrum. Meas., 2011

2010

A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications.

Chandradevi Ulaganathan, Neena Nambiar, Kimberly Cornett, Robert L. Greenwell, Jeremy A. Yager, Benjamin S. Prothro, Kevin Tham, Suheng Chen, Richard S. Broughton, Guoyuan Fu, Benjamin J. Blalock, Charles L. Britton Jr., M. Nance Ericson, H. Alan Mantooth, Mohammad M. Mojarradi, Richard W. Berger, John D. Cressler

VLSI Design, 2010

Selected Papers from the Midwest Symposium on Circuits and Systems.

Gregory D. Peterson, Ethan D. Farquhar, Benjamin J. Blalock

VLSI Design, 2010

2008

Genetically-engineered whole-cell bioreporters on integrated circuits for environmental monitoring.

Nora D. Bull, Syed Kamrul Islam, Benjamin J. Blalock, Steven Ripp, Scott Moser, Gary S. Sayler

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Integrated Circuit Biosensors Using Living Whole-Cell Bioreporters.

Syed Kamrul Islam, Vijayaraghavan Rajagopal, Mo Zhang, Steven Ripp, Sam D. Caylor, Brandon Weathers, Scott Moser, Stephen C. Terry, Benjamin J. Blalock, Gary S. Sayler

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2006

Switched capacitor bandgap voltage reference for sub-1-V operation.

Suheng Chen, Benjamin J. Blalock

IEICE Electron. Express, 2006

A SiGe BiCMOS linear regulator with wideband, high power supply rejection.

Hung D. Nguyen, Benjamin J. Blalock, Suheng Chen

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005

Adaptive gate biasing: a new solution for body-driven current mirrors.

Stephen C. Terry, Mohammad M. Mojarradi, Benjamin J. Blalock, Jesse A. Richmond

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

The G⁴-FET: a universal and programmable logic gate.

Amir Fijany, Farrokh Vatan, Mohammad M. Mojarradi, Nikzad Benny Toomarian, Benjamin J. Blalock, Kerem Akarvardar, Sorin Cristoloveanu, Pierre Gentil

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

SOI four-gate transistors (G⁴-FETs) for high voltage analog applications.

Suheng Chen, James Vandersand, Benjamin J. Blalock, Kerem Akarvardar, Sorin Cristoloveanu, Mohammad M. Mojarradi

Proceedings of the 31st European Solid-State Circuits Conference, 2005

A novel four-quadrant analog multiplier using SOI four-gate transistors (G⁴-FETs).

Kerem Akarvardar, Suheng Chen, Benjamin J. Blalock, Sorin Cristoloveanu, Pierre Gentil, Mohammad M. Mojarradi

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications.

Brian K. Swann, Benjamin J. Blalock, Lloyd G. Clonts, David M. Binkley, James M. Rochelle, Eric Breeding, K. Michelle Baldwin

IEEE J. Solid State Circuits, 2004

1995

Low voltage analog circuits using standard CMOS technology.

Phillip E. Allen, Benjamin J. Blalock, Gabriel A. Rincon

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

A Low-Voltage, Bulk-Driven MOSFET Current Mirror for CMOS Technology.

Benjamin J. Blalock, Phillip E. Allen

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995