Bertrand Borot

According to our database, Bertrand Borot authored at least 4 papers between 2003 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Back-end soft and hard defect monitoring using a single test chip.

Fabrice Rigaud, Jean-Michel Portal, Hassen Aziza, Didier Née, Julien Vast, Fabrice Argoud, Bertrand Borot

Microelectron. Reliab., 2011

2010

A 40nm CMOS 260kb SRAM-bitcell on-chip failure monitoring test scribe with integer-to-current converter.

Brice Lhomme, Yann Carminati, Bertrand Borot, Olivier Callen, Thierry Burdeau, Sylvain Clerc

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2008

Predictive Delay Evaluation on Emerging CMOS Technologies: A Simulation Framework.

Manuel Sellier, Jean-Michel Portal, Bertrand Borot, Steve Colquhoun, Richard Ferrant, Frédéric Boeuf, Alexis Farcy

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2003

Infrastructure IP for Back-End Yield Improvement.

L. Forli, Jean-Michel Portal, Didier Née, Bertrand Borot

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003