Bharadwaj Parthasarathy

According to our database, Bharadwaj Parthasarathy authored at least 2 papers between 1994 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

A 6.25-Gb/s binary transceiver in 0.13-μm CMOS for serial data transmission across high loss legacy backplane channels.

Robert Payne, Paul E. Landman, Bhavesh Bhakta, Sridhar Ramaswamy, Song Wu, John D. Powers, M. Ulvi Erdogan, Ah-Lyan Yee, Richard Gu, Lin Wu, Yiqun Xie, Bharadwaj Parthasarathy, Keith C. Brouse, Wahed Mohammed, Keerthi Heragu, Vikas Gupta, Lisa Dyson, Wai Lee

IEEE J. Solid State Circuits, 2005

1994

A Parallel Algorithm and Architecture for Robot Path Planning.

N. Ranganathan, Bharadwaj Parthasarathy, Ken Hughes

Proceedings of the 8th International Symposium on Parallel Processing, 1994