Robert Payne

According to our database1, Robert Payne authored at least 17 papers between 1962 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2015
An efficient and resilient ultra-high speed galvanic data isolator leveraging broad-band multi resonant tank electro-magnetic coupling.
Proceedings of the Symposium on VLSI Circuits, 2015

2014
A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC.
IEEE J. Solid State Circuits, 2014

2013
A 5-Gb/s Automatic Sub-Bit Between-Pair Skew Compensator for Parallel Data Communications in 0.13-µm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2013

A 10GS/s 6b time-interleaved ADC with partially active flash sub-ADCs.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
Session 7 overview: Multi-Gb/s receiver and parallel I/O techniques: Wireline subcommittee.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Good, bad, ugly - 20 years of broadband evolution: What's next?
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.
IEEE J. Solid State Circuits, 2010

Energy-efficient high-speed interfaces.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
Will ADCs overtake binary frontends in backplane signaling?
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 18mW 10Gbps continuous-time FIR equalizer for wired line data communications in 0.12µm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
Future of High-Speed Transceivers (Forum).
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
Multi-GB/s Transceivers.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1999
Panel: What is the Proper System on Chip Design Methodology.
Proceedings of the 36th Conference on Design Automation, 1999

1997
Self-timed field programmmable gate array architectures.
PhD thesis, 1997

1962
Online digital computer measurement of a neurological control system.
Commun. ACM, 1962


  Loading...