Bikram Paul
Orcid: 0000-0003-2751-9702
According to our database1,
Bikram Paul authored at least 11 papers
between 2017 and 2026.
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Bibliography
2026
A Two-Bit Error Correction Protocol for Low-Power Serial Communication in IoT Systems.
Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026
2025
QIEDP: A Quantum-Inspired Two-Bit Error Correction Protocol for Low-Power Serial Communication in IoT Systems.
Proceedings of the 32nd IEEE International Conference on High Performance Computing, 2025
Neuromorphic Adaptive Precision RISC-V Processor with Real-Time Precision Scaling and Neuronal State Management.
Proceedings of the 32nd IEEE International Conference on High Performance Computing, Data and Analytics, HiPC 2025, 2025
2023
Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications.
IEEE Trans. Computers, June, 2023
A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA.
IEEE Trans. Computers, May, 2023
2022
J. Inf. Technol. Res., 2022
Triple Pendulum Based Nonlinear Chaos Generator and its Applications in Cryptography.
IEEE Access, 2022
2020
Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications.
Proceedings of the 30th International Conference Radioelektronika, 2020
Proceedings of the 30th International Conference Radioelektronika, 2020
2019
Design and Implementation of Low-Power High-throughput PRNGs for Security Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
2017
Approxhash: delay, power and area optimized approximate hash functions for cryptography applications.
Proceedings of the 10th International Conference on Security of Information and Networks, 2017