Meenali Janveja

Orcid: 0000-0002-6366-9348

According to our database1, Meenali Janveja authored at least 11 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices.
IEEE Trans. Very Large Scale Integr. Syst., March, 2023

MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

2022
A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications.
Integr., 2022

An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices.
Proceedings of the 32nd International Conference Radioelektronika, 2022

An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications.
Proceedings of the 32nd International Conference Radioelektronika, 2022

2021
Design of Low Power VLSI Architecture for Classification of Arrhythmic Beats Using DNN for Wearable Device Applications.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2020
Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications.
Proceedings of the 30th International Conference Radioelektronika, 2020

2019
A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems.
Proceedings of the 2019 IEEE International Conference on Systems, Man and Cybernetics, 2019

StormOptimus: A Single Objective Constrained Optimizer Based on Brainstorming Process for VLSI Circuits.
Proceedings of the Brain Storm Optimization Algorithms: Concepts, 2019


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