Gaurav Trivedi
Orcid: 0000-0003-2189-3656
According to our database1,
Gaurav Trivedi
authored at least 91 papers
between 2006 and 2023.
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Bibliography
2023
An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
FPGA Implementation of Modified SNOW 3G Stream Ciphers Using Fast and Resource Efficient Substitution Box.
IEEE Embed. Syst. Lett., December, 2023
Fast power density aware three-dimensional integrated circuit floorplanning for hard macroblocks using best operator combination genetic algorithm.
Int. J. Circuit Theory Appl., October, 2023
Multi-objective Hybrid Particle Swarm Optimization and its Application to Analog and RF Circuit Optimization.
Circuits Syst. Signal Process., August, 2023
Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications.
IEEE Trans. Computers, June, 2023
A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA.
IEEE Trans. Computers, May, 2023
A MOS-DTMOS Implementation of Floating Memristor Emulator for High-Frequency Applications.
IEEE Trans. Very Large Scale Integr. Syst., March, 2023
Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices.
IEEE Trans. Very Large Scale Integr. Syst., March, 2023
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
RRAM-Based Energy Efficient Scalable Integrate and Fire Neuron With Built-In Reset Circuit.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
Proceedings of the 33rd International Conference Radioelektronika, 2023
Proceedings of the 33rd International Conference Radioelektronika, 2023
Comparison of Hardware Implementations of Cryptographic Algorithms for IoT Applications.
Proceedings of the 33rd International Conference Radioelektronika, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Binary Synaptic Array for Inference and Training with Built-in RRAM Electroforming Circuit.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
2022
A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications.
Integr., 2022
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
Digit. Signal Process., 2022
A 28-Gbps Radix-16, 512-Point FFT Processor-Based Continuous Streaming OFDM for WiGig.
Circuits Syst. Signal Process., 2022
Triple Pendulum Based Nonlinear Chaos Generator and its Applications in Cryptography.
IEEE Access, 2022
Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications.
Proceedings of the 32nd International Conference Radioelektronika, 2022
Proceedings of the 32nd International Conference Radioelektronika, 2022
An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices.
Proceedings of the 32nd International Conference Radioelektronika, 2022
Comparison of Floating-point Representations for the Efficient Implementation of Machine Learning Algorithms.
Proceedings of the 32nd International Conference Radioelektronika, 2022
Design and Implementation of a Low Power Area Efficient Bfloat16 based CORDIC Processor.
Proceedings of the 32nd International Conference Radioelektronika, 2022
An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications.
Proceedings of the 32nd International Conference Radioelektronika, 2022
2021
PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique.
Microprocess. Microsystems, 2021
Introspection Into Reliability Aspects in AlGaN/GaN HEMTs With Gate Geometry Modification.
IEEE Access, 2021
A Low-Complexity Shifting-Based Conflict-Free Memory-Addressing Architecture for Higher-Radix FFT.
IEEE Access, 2021
Design of Low Power VLSI Architecture for Classification of Arrhythmic Beats Using DNN for Wearable Device Applications.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
2020
PGRDP: Reliability, Delay, and Power-Aware Area Minimization of Large-Scale VLSI Power Grid Network Using Cooperative Coevolution.
Proceedings of the Intelligent Computing Paradigm: Recent Trends, 2020
Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network.
ACM Trans. Design Autom. Electr. Syst., 2020
IET Circuits Devices Syst., 2020
Methodology and comparative design of an efficient 4-bit encoder with bubble error corrector for 1-GSPS flash type ADC.
IET Circuits Devices Syst., 2020
Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications.
Proceedings of the 30th International Conference Radioelektronika, 2020
Proceedings of the 30th International Conference Radioelektronika, 2020
Theoretical Study and Optimization of Apodized Fiber Bragg Grating for Single and Quasi-distributed Structural Health Monitoring Applications.
Proceedings of the 30th International Conference Radioelektronika, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Trans. Computers, 2019
Identifying incidental findings from radiology reports of trauma patients: An evaluation of automated feature representation methods.
Int. J. Medical Informatics, 2019
Interactive NLP in Clinical Care: Identifying Incidental Findings in Radiology Reports.
Appl. Clin. Inform., 2019
Design and Implementation of Low-Power High-throughput PRNGs for Security Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems.
Proceedings of the 2019 IEEE International Conference on Systems, Man and Cybernetics, 2019
Proceedings of the 2019 IEEE International Conference on Systems, Man and Cybernetics, 2019
StormOptimus: A Single Objective Constrained Optimizer Based on Brainstorming Process for VLSI Circuits.
Proceedings of the Brain Storm Optimization Algorithms: Concepts, 2019
2018
ACM Trans. Embed. Comput. Syst., 2018
Multiobjective analog/RF circuit sizing using an improved brain storm optimization algorithm.
Memetic Comput., 2018
J. Syst. Inf. Technol., 2018
<i>Kapees3</i>: A High-Quality VLSI Placement Tool Using Nesterov's Method for Density Penalty.
J. Circuits Syst. Comput., 2018
J. Am. Medical Informatics Assoc., 2018
IET Comput. Digit. Tech., 2018
PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the IEEE International Conference on Healthcare Informatics, 2018
Proceedings of the IEEE International Conference on Healthcare Informatics, 2018
2017
Optimization of 2.4 GHz CMOS Low Noise Amplifier Using Hybrid Particle Swarm Optimization with Lévy Flight.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017
Approxhash: delay, power and area optimized approximate hash functions for cryptography applications.
Proceedings of the 10th International Conference on Security of Information and Networks, 2017
Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017
Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017
A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology.
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017
2016
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
2015
A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits.
Proceedings of the 28th International Conference on VLSI Design, 2015
A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015
Variability-aware parametric yield enhancement via post-silicon tuning of hybrid redundant MAC units.
Proceedings of the VLSI Design, Automation and Test, 2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
Proceedings of the Legal Knowledge and Information Systems, 2015
Proceedings of the 20th International Conference on Intelligent User Interfaces Companion, 2015
2013
Circuits Syst. Signal Process., 2013
Proceedings of the VLSI Design and Test, 17th International Symposium, 2013
2012
Proceedings of the 4th International Conference on Intercultural Collaboration, 2012
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006