Sunil Dutt
Orcid: 0000-0002-1706-5164
According to our database1,
Sunil Dutt
authored at least 14 papers
between 2008 and 2020.
Collaborative distances:
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Bibliography
2020
J. Electron. Test., 2020
Proceedings of the 30th International Conference Radioelektronika, 2020
2019
IEEE Trans. Computers, 2019
Design and Implementation of Low-Power High-throughput PRNGs for Security Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
2018
ACM Trans. Embed. Comput. Syst., 2018
IET Comput. Digit. Tech., 2018
2017
Approxhash: delay, power and area optimized approximate hash functions for cryptography applications.
Proceedings of the 10th International Conference on Security of Information and Networks, 2017
2016
Bit-width-aware constant-delay run-time Accuracy Programmable Adder for error-resilient applications.
Microelectron. J., 2016
Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
2015
A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications.
Proceedings of the 28th International Conference on VLSI Design, 2015
Variability-aware parametric yield enhancement via post-silicon tuning of hybrid redundant MAC units.
Proceedings of the VLSI Design, Automation and Test, 2015
2014
A New Sensitivity-Driven Process Variation Aware Self-Repairing Low-Power SRAM Design.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
2013
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2008
IEEE Trans. Educ., 2008