Biswajit Patra

According to our database, Biswajit Patra authored at least 11 papers between 2011 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Enhancing image captioning with asynchronous dual attention vision transformer.

Biswajit Patra, Dakshina Ranjan Kisku

Intell. Data Anal., 2026

2025

Context-Aware Image Description via Dual-Stream Visual Encoding and Guided Multimodal Learning.

Biswajit Patra, Chiradeep Ghosh, Dakshina Ranjan Kisku

Proceedings of the Pattern Recognition and Machine Intelligence, 2025

2024

Modeling International Tourist Arrivals: An NLP Perspective.

Archana Yadav, Biswajit Patra, Tanmay Basu

Oper. Res. Forum, December, 2024

Does digital payment induce economic growth in emerging economies? The mediating role of institutional quality, consumption expenditure, and bank credit.

Biswajit Patra, Narayan Sethi

Inf. Technol. Dev., January, 2024

2023

Precise and Faster Image Description Generation with Limited Resources Using an Improved Hybrid Deep Model.

Biswajit Patra, Dakshina Ranjan Kisku

Proceedings of the Pattern Recognition and Machine Intelligence, 2023

2020

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm², 1mm Package-on-Package.

Wilfred Gomes, Sanjeev Khushu, Doug B. Ingerly, Patrick N. Stover, Nasirul I. Chowdhury, Frank O'Mahony, Ajay Balankutty, Noam Dolev, Martin G. Dixon, Lei Jiang, Surya Prekke, Biswajit Patra, Pavel V. Rott, Rajesh Kumar

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2017

Usability, tested?

Neha Kumar, Naveena Karusala, Aaditeshwar Seth, Biswajit Patra

Interactions, 2017

2015

A framework for energy efficient and flexible offloading scheme for handheld devices.

Biswajit Patra, Sarbani Roy, Chandreyee Chowdhury

Proceedings of the 2015 IEEE International Conference on Advanced Networks and Telecommuncations Systems, 2015

2014

Post Optimization of a Clock Tree for Dynamic Clock Tree Power Reduction in 45 nm and Below Technology Nodes.

Biswajit Patra, Amlan Chakrabarti, Sanatan Chattopadhyay

J. Low Power Electron., 2014

2012

A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes.

Biswajit Patra, Sanatan Chattopadhyay, Amlan Chakrabarti

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

2011

An Efficient Methodology for Full Chip Signal ElectroMigration Analysis for Advanced Technology Node Designs.

Biswajit Patra, Nayan Chandak, Amlan Chakrabarti

J. Low Power Electron., 2011