Patrick N. Stover

According to our database1, Patrick N. Stover authored at least 3 papers between 2020 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2020
8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm<sup>2</sup>, 1mm Package-on-Package.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020


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