Bogdan F. Romanescu

According to our database, Bogdan F. Romanescu authored at least 8 papers between 2007 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Address Translation Aware Memory Consistency.

Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin

IEEE Micro, 2011

2010

Cost-effective Designs for Supporting Correct Execution and Scalable Performance in Many-core Processors.

Bogdan F. Romanescu

PhD thesis, 2010

UNified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all.

Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin, Anne Bracy

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Specifying and dynamically verifying address translation-aware memory consistency.

Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin

Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

2008

Reducing the impact of intra-core process variability with criticality-based resource allocation and prefetching.

Bogdan F. Romanescu, Michael E. Bauer, Sule Ozev, Daniel J. Sorin

Proceedings of the 5th Conference on Computing Frontiers, 2008

Core cannibalization architecture: improving lifetime chip performance for multicore processors in the presence of hard faults.

Bogdan F. Romanescu, Daniel J. Sorin

Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007

VariaSim: simulating circuits and systems in the presence of process variability.

Bogdan F. Romanescu, Michael E. Bauer, Sule Ozev, Daniel J. Sorin

SIGARCH Comput. Archit. News, 2007

Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation.

Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, Sule Ozev

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007