Boris Dreyer

Orcid: 0000-0001-5772-2168

According to our database1, Boris Dreyer authored at least 10 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Call String Sensitivity for Hardware-Based Hybrid WCET Analysis.
IEEE Embed. Syst. Lett., 2022

2019
Iterative Histogram-Based Performance Analysis of Embedded Systems.
IEEE Embed. Syst. Lett., 2019

Non-Intrusive Online Timing Analysis of Large Embedded Applications.
Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis, 2019

2018
Online analysis of debug trace data for embedded systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Hardware Support for Histogram-Based Performance Analysis of Embedded Systems.
Proceedings of the 20th IEEE International Symposium on Real-Time Distributed Computing, 2017

2016
Low-Cost Real-Time 3D Reconstruction of Large-Scale Excavation Sites.
ACM Journal on Computing and Cultural Heritage, 2016

Continuous Non-Intrusive Hybrid WCET Estimation Using Waypoint Graphs.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016

2015
Precise Continuous Non-Intrusive Measurement-Based Execution Time Estimation.
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015

2014
Low-Cost Real-Time 3D Reconstruction of Large-Scale Excavation Sites using an RGB-D Camera.
Proceedings of the 12th Eurographics Workshop on Graphics and Cultural Heritage, 2014

2013
A generic, scalable reconfiguration infrastructure for sensor networks functionality adaption.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013


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