Bram De Muer

According to our database1, Bram De Muer authored at least 9 papers between 1999 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2012
A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2003
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

2002
A CMOS monolithic ΔΣ-controlled fractional-N frequency synthesizer for DCS-1800.
IEEE J. Solid State Circuits, 2002

2000
A 2-V CMOS cellular transceiver front-end.
IEEE J. Solid State Circuits, 2000

A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization.
IEEE J. Solid State Circuits, 2000

The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

CYCLONE: automated design and layout of RF LC-oscillators.
Proceedings of the 37th Conference on Design Automation, 2000

1999
RF Communication Circuits.
Proceedings of the VLSI Handbook., 1999

A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999


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