Brendan Mullane

According to our database, Brendan Mullane authored at least 25 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters.

Shantanu Mehta, Roberto Pelliconi, Christophe Erdmann, Vincent O'Brien, Brendan Mullane

IEEE Open J. Circuits Syst., 2021

A Higher-Order Programmable Amplitude and Timing Error Shaping Bandpass DEM for Nyquist-Rate D/A Converters.

Shantanu Mehta, Brendan Mullane, Vincent O'Brien, Roberto Pelliconi, Christophe Erdmann

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Hardware Implementation of a qEEG-Based Discriminant Function for Brain Injury Detection.

Fotios Kostarelos, Ciaran MacNamee, Brendan Mullane

Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021

2020

High Order Mismatch Shaping for Low Oversampling Rates.

Vincent O'Brien, Brendan Mullane

IEEE Trans. Circuits Syst. II Express Briefs, 2020

Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs.

Shantanu Mehta, Daniel O'Hare, Vincent O'Brien, Eric Thompson, Brendan Mullane

IEEE Open J. Circuits Syst., 2020

A Wideband 6th Order Programmable Bandpass DEM Implementation for a Nyquist DAC.

Shantanu Mehta, Brendan Mullane, Vincent O'Brien, Roberto Pelliconi, Christophe Erdmann

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

A Tri-level Current-Steering DAC Design with Improved Output-Impedance Related Dynamic Performance.

Shantanu Mehta, Anthony G. Scanlan, Brendan Mullane, Daniel O'Hare

Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

2018

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs.

Daniel O'Hare, Anthony G. Scanlan, Eric Thompson, Brendan Mullane

IEEE Trans. Very Large Scale Integr. Syst., 2018

Correction to: A Reduced Hardware ISI and Mismatch Shaping DEM Decoder.

Vincent O'Brien, Anthony G. Scanlan, Brendan Mullane

Circuits Syst. Signal Process., 2018

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder.

Vincent O'Brien, Anthony G. Scanlan, Brendan Mullane

Circuits Syst. Signal Process., 2018

An In-Place Processor Design for Real-Value FFTs Targeting in-situ Dynamic ADC Test.

Brendan Mullane, Vincent O'Brien

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2014

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics.

Christopher Bailey, Brendan Mullane

VLSI Design, 2014

2013

Experimental validation of DAC with nested bus-splitting EFM4 DDSM.

Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2011

A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process.

Brendan Mullane, Vincent O'Brien

Proceedings of the VLSI-SoC: Advanced Research for Systems on Chip, 2011

A high performance band-pass DAC architecture and design targeting a low voltage silicon process.

Brendan Mullane, Vincent O'Brien

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

High order mismatch noise shaping for bandpass DACs.

Vincent O'Brien, Brendan Mullane

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010

Design and implementation challenges for adoption of the IEEE 1500 standard.

Michael Higgins, Ciaran MacNamee, Brendan Mullane

IET Comput. Digit. Tech., 2010

2009

A prototype platform for system-on-chip ADC test and measurement.

Brendan Mullane, Vincent O'Brien, Ciaran MacNamee, Thomas Fleischmann

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A2DTest: A complete integrated solution for on-chip ADC self-test and analysis.

Brendan Mullane, Vincent O'Brien, Ciaran MacNamee, Thomas Fleischmann

Proceedings of the 2009 IEEE International Test Conference, 2009

An on-chip solution for static ADC test and measurement.

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, Thomas Fleischmann

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

An SOC platform for ADC test and measurement.

Brendan Mullane, Vincent O'Brien, Ciaran MacNamee, Thomas Fleischmann

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

IEEE 1500 Core Wrapper Optimization Techniques and Implementation.

Brendan Mullane, Michael Higgins, Ciaran MacNamee

Proceedings of the 2008 IEEE International Test Conference, 2008

A Novel System on Chip (SoC) Test Solution.

Michael Higgins, Ciaran MacNamee, Brendan Mullane

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

SoCECT: System on Chip Embedded Core Test.

Michael Higgins, Ciaran MacNamee, Brendan Mullane

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007

FPGA Prototyping of a Scan Based System-On-Chip Design.

Brendan Mullane, Chen-Huan Chiang, Michael Higgins, Ciaran MacNamee, Tapan J. Chakraborty, Thomas B. Cook

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007