Brian Butcher

According to our database, Brian Butcher authored at least 5 papers between 2003 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Connecting RRAM performance to the properties of the hafnia-based dielectrics.

Gennadi Bersuker, Brian Butcher, David Gilmer, Paul Kirsch, Luca Larcher, Andrea Padovani

Proceedings of the European Solid-State Device Research Conference, 2013

2010

FPGA based on integration of memristors and CMOS devices.

Wei Wang, Tom T. Jing, Brian Butcher

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

cFPGA: CNT emerging memory-based FPGA.

Wei Wang, Tom T. Jing, Brian Butcher

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2003

Magnetoresistive random access memory using magnetic tunnel junctions.

Saied Tehrani, Jon M. Slaughter, Mark Deherrera, Brad N. Engel, Nicholas D. Rizzo, John Salter, Mark Durlam, Renu W. Dave, Jason Janesky, Brian Butcher, Ken Smith, Greg Grynkewich

Proc. IEEE, 2003

A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects.

Mark Durlam, Peter J. Naji, Asim Omair, Mark Deherrera, John Calder, Jon M. Slaughter, Brad N. Engel, Nicholas D. Rizzo, Greg Grynkewich, Brian Butcher, Clarence Tracy, Ken Smith, Kelly W. Kyler, J. Jack Ren, Jaynal A. Molla, William A. Feil, Rick G. Williams, Saied Tehrani

IEEE J. Solid State Circuits, 2003