Wei Wang

IEEE Trans. Very Large Scale Integr. Syst., 2011

3D Integration of CMOL Structures for FPGA Applications.

[BibT_eX]

[DOI]

Zine Abid

IEEE Trans. Computers, 2011

Self-test method and recovery mechanism for high frequency TSV array.

[BibT_eX]

[DOI]

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

2010

FPGA based on integration of memristors and CMOS devices.

[BibT_eX]

[DOI]

Tom T. Jing

Brian Butcher

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

cFPGA: CNT emerging memory-based FPGA.

[BibT_eX]

[DOI]

Tom T. Jing

Brian Butcher

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Design considerations for variation tolerant multilevel CMOS/Nano memristor memory.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Reconfigurable multi-function logic based on graphene P-N junctions.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

2009

Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices.

[BibT_eX]

[DOI]

Proceedings of the Nano-Net - 4th International ICST Conference, 2009

FPGA based on integration of carbon nanorelays and CMOS devices.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009

Monolithic Graphene Nanoribbon Electronics for Interconnect Performance Improvement.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A route towards production-worthy 5 µm × 25 µm and 1 µm × 20 µm non-Bosch through-silicon-via (TSV) etch, TSV metrology, and TSV integration.

[BibT_eX]

[DOI]

Thenappan Chidambaram

Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008

Countermeasures for Hardware Fault Attack in Multi-Prime RSA Cryptosystems.

[BibT_eX]

[DOI]

Zine-Eddine Abid

Int. J. Netw. Secur., 2008

Exploring Multi-layer Graphene Nanoribbon Interconnects.

[BibT_eX]

[DOI]

Sansiri Tanachutiwat

Proceedings of the Nano-Net - Third International ICST Conference, 2008

3D CMOL Crossnet for Neuromorphic Network Applications.

[BibT_eX]

[DOI]

Kevin Ryan

Sansiri Tanachutiwat

Proceedings of the Nano-Net - Third International ICST Conference, 2008

FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications.

[BibT_eX]

[DOI]

Hua Yu

Proceedings of the Nano-Net - Third International ICST Conference, 2008

rFGA: CMOS-nano hybrid FPGA using RRAM components.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures, 2008

Analyzing mixed carbon nanotube bundles: A current density study.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

New designs of Redundant-Binary full Adders and its applications.

[BibT_eX]

[DOI]

Zine Abid

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

3-D nFPGA: A Reconfigurable Architecture for 3-D CMOS/Nanomaterial Hybrid Digital Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Hardware Organization to Achieve High-Speed Elliptic Curve Cryptography for Mobile Devices.

[BibT_eX]

[DOI]

Sining Liu

Brian King

Mob. Networks Appl., 2007

Fault Tolerance Circuit for AM-OLED.

[BibT_eX]

[DOI]

Dayong Li

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

Hybrid Nanoelectronics: Future of Computer Technology.

[BibT_eX]

[DOI]

Andrew Hsu

J. Comput. Sci. Technol., 2006

On-Chip Interconnects and Repeaters Based on NiSi Nanowires.

[BibT_eX]

[DOI]

Adam Maina Ari

Woon Ket Wong

Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Passive reduced-order macromodeling algorithm for structure dynamics in MEMS systems.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An efficient adaptive interlace-to-progressive scan conversion scheme and hardware implementation.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Elliptic curves cryptosystem implementation based on a look-up table sharing scheme.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Exploring carbon nanotubes and NiSi nanowires as on-chip interconnections.

[BibT_eX]

[DOI]

Chen Dong

S. Haruehanroengra

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CRT-RSA Algorithm Secure against Hardware Fault Attacks.

[BibT_eX]

[DOI]

Sining Liu

Brian King

Proceedings of the Second International Symposium on Dependable Autonomic and Secure Computing (DASC 2006), 29 September, 2006

2005

RRNS Quasi-Chaotic Coding and Its FPGA Implementation.

[BibT_eX]

[DOI]

Proceedings of the 6th ACIS International Conference on Software Engineering, 2005

An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Performance comparison of quantum-dot cellular automata adders.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Efficient multi-prime RSA immune against hardware fault attack.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Two-prime RSA immune cryptosystem and its FPGA implementation.

[BibT_eX]

[DOI]

Ying Yang

Zine-Eddine Abid

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

Novel Design and Fpga Implementation of Da-rns Fir Filters.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2004

An Immune CRT-Based Three-prime RSA cryptosystem.

[BibT_eX]

Yonghong Yang

Zine-Eddine Abid

Proceedings of the 4th IEEE International Workshop on Source Code Analysis and Manipulation (SCAM 2004), 2004

RNS Application for Digital Image Processing.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Powder-based fabrication techniques for single-wall carbon nanotube circuits.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Modulo deflation in (2n+1, 2n, 2n-1) converters.

[BibT_eX]

Shaoqiang Bi

Asim J. Al-Khalili

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

New modulo decomposed residue-to-binary algorithm for general moduli sets.

[BibT_eX]

[DOI]

Shaoqiang Bi

Asim J. Al-Khalili

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

Moduli selection in RNS for efficient VLSI implementation.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

A Parallel Residue-to-binary Converter for the Moduli Set {2m-1, 220m+1, 221m+1, ..., 22km+1}.

[BibT_eX]

[DOI]

VLSI Design, 2002

A new architecture of RRNS error-correcting QC encoder/decoder and its FPGA implementation.

[BibT_eX]

[DOI]