Cagri Erbagci

According to our database, Cagri Erbagci authored at least 4 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

MANIC: A $19\mu\mathrm{W}$ @ 4MHz, 256 MOPS/mW, RISC-V microcontroller with embedded MRAM main memory and vector-dataflow co-processor in 22nm bulk finFET CMOS.

Graham Gobieski, Oguz Atli, Cagri Erbagci, Ken Mai, Nathan Beckmann, Brandon Lucia

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 10.33 μJ/encryption Homomorphic Encryption Engine in 28nm CMOS with 4096-degree 109-bit Polynomials for Resource-Constrained IoT Clients.

Siddharth Das, McKenzie van der Hagen, Swarali Patil, Cagri Erbagci, Brandon Lucia, Ken Mai

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2019

An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS.

Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai

Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2016

A secure camouflaged threshold voltage defined logic family.

Burak Erbagci, Cagri Erbagci, Nail Etkin Can Akkaya, Ken Mai

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016