Cagri Erbagci

According to our database1, Cagri Erbagci authored at least 2 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2016
A secure camouflaged threshold voltage defined logic family.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016


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