Burak Erbagci

According to our database, Burak Erbagci authored at least 14 papers between 2010 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS.

Mahmut E. Sinangil, Burak Erbagci, Rawan Naous, Kerem Akarvardar, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang

IEEE J. Solid State Circuits, 2021

2020

15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications.

Qing Dong, Mahmut E. Sinangil, Burak Erbagci, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019

Secure hardware-entangled field programmable gate arrays.

Burak Erbagci, Nail Etkin Can Akkaya, Mudit Bhargava, Rachel Dondero, Ken Mai

J. Parallel Distributed Comput., 2019

An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS.

Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai

Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018

A secure camouflaged logic family using post-manufacturing programming with a 3.6GHz adder prototype in 65nm CMOS at 1V nominal VDD.

Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A compact energy-efficient pseudo-static camouflaged logic family.

Prashanth Mohan, Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Secure chip odometers using intentional controlled aging.

Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

2016

A secure camouflaged threshold voltage defined logic family.

Burak Erbagci, Cagri Erbagci, Nail Etkin Can Akkaya, Ken Mai

Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

2015

Deeply hardware-entangled reconfigurable logic and interconnect.

Burak Erbagci, Mudit Bhargava, Rachel Dondero, Ken Mai

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

A DPA-resistant self-timed three-phase dual-rail pre-charge logic family.

Nail Etkin Can Akkaya, Burak Erbagci, Raymond Carley, Ken Mai

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm.

Burak Erbagci, Nail Etkin Can Akkaya, Craig Teegarden, Ken Mai

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS.

Burak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2012

An adaptive bilateral motion estimation algorithm and its hardware architecture.

Abdulkadir Akin, Mert Cetin, Tevfik Zafer Ozcan, Burak Erbagci, Ilker Hamzaoglu

IEEE Trans. Consumer Electron., 2012

2010

An adaptive bilateral motion estimation algorithm and its hardware architecture.

Abdulkadir Akin, Mert Cetin, Burak Erbagci, Ozgur Karakaya, Ilker Hamzaoglu

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010