Calogero Ribellino

Orcid: 0009-0009-8862-9324

According to our database1, Calogero Ribellino authored at least 7 papers between 2013 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A Compact and Efficient 40 V Capacitive Level Shifter With Feedback Discharge Control for Enhanced CMTI and Low FoM for Bootstrapped Gate Drivers in BCD Technology.
IEEE Trans. Very Large Scale Integr. Syst., January, 2026

Integrated Gate Driver with Adaptive Dead-Time Control and Gate-Drive Boost for High-Efficiency BCD Synchronous Buck Converters.
Proceedings of the 29th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2026

2025
46-nA High-PSR CMOS Buffered Voltage Reference With 1.2-5 V and -40 <sup>◦</sup>C to 125 <sup>◦</sup>C Operating Range.
IEEE Trans. Very Large Scale Integr. Syst., February, 2025

A 40V High-Speed Low-FoM Capacitive Level Shifter with Feedback Discharge Control for Floating Supply Gate Drivers on BCD Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2023
Programmable 1 A ultra-low dropout LDO regulator for high-resolution camera sensors.
Microelectron. J., September, 2023

2017
Improving ICs reliability with high speed thermal mapping.
Proceedings of the 14th International Conference on Synthesis, 2017

2013
A 0.25-mm CMOS, 7-ppm/°C, 8-mA quiescent current, ±5-mA output current low-dropout voltage regulator.
Proceedings of the ESSCIRC 2013, 2013


  Loading...