Cameron D. Patterson

Affiliations:
  • Virginia Tech


According to our database1, Cameron D. Patterson authored at least 35 papers between 2004 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2019
Semidefinite Relaxation-Based PAPR-Aware Precoding for Massive MIMO-OFDM Systems.
IEEE Trans. Veh. Technol., 2019

2018
Surveying the Hardware Trojan Threat Landscape for the Internet-of-Things.
J. Hardw. Syst. Secur., 2018

2017
Architectural refinements for enhancing trust and securing cyber-physical systems.
Proceedings of the 2017 IEEE SmartWorld, 2017

2016
A hands-on modular laboratory environment to foster learning in control system security.
Proceedings of the 2016 IEEE Frontiers in Education Conference, 2016

Detecting and thwarting hardware trojan attacks in cyber-physical systems.
Proceedings of the 2016 IEEE Conference on Communications and Network Security, 2016

2015
Enhancing Trust in Reconfigurable Based Hardware Systems with Tags and Monitors.
IACR Cryptol. ePrint Arch., 2015

Unraveling the Security Puzzle: A Distributed Framework to Build Trust in FPGAs.
Proceedings of the Network and System Security - 9th International Conference, 2015

FIDES: Enhancing trust in reconfigurable based hardware systems.
Proceedings of the 2015 IEEE High Performance Extreme Computing Conference, 2015

Using Heterogeneous Computing to Implement a Trust Isolated Architecture for Cyber-Physical Control Systems.
Proceedings of the 1st ACM Workshop on Cyber-Physical System Security, 2015

The Trustworthy Autonomic Interface Guardian Architecture for Cyber-Physical Systems.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015

2014
High-Level Abstractions and Modular Debugging for FPGA Design Validation.
ACM Trans. Reconfigurable Technol. Syst., 2014

Using high-level synthesis and formal analysis to predict and preempt attacks on industrial control systems.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Application-Level Autonomic Hardware to Predict and Preempt Software Attacks on Industrial Control Systems.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

2012
Run-time prediction and preemption of configuration attacks on embedded process controllers.
Proceedings of the First International Conference on Security of Internet of Things, 2012

Interacting with Hardware Trojans over a network.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012

2011
Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Thwarting Software Attacks on Data-Intensive Platforms with Configurable Hardware-Assisted Application Rule Enforcement.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
MetaWire: Using FPGA configuration circuitry to emulate a network-on-chip.
IET Comput. Digit. Tech., 2010

PATIS: Using partial configuration to improve static FPGA design productivity.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Using partial reconfiguration and high-level models to accelerate FPGA design validation.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Accelerating FPGA development through the automatic parallel application of standard implementation tools.
Proceedings of the International Conference on Field-Programmable Technology, 2010

2009
Searching for Transient Pulses with the ETA Radio Telescope.
ACM Trans. Reconfigurable Technol. Syst., 2009

Slotless module-based reconfiguration of embedded FPGAs.
ACM Trans. Embed. Comput. Syst., 2009

Cognitive Radio and Networking Research at Virginia Tech.
Proc. IEEE, 2009

Data streaming and simd support for the microblaze architecture.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008
Exploiting Process Locality of Reference in RTL Simulation Acceleration.
EURASIP J. Embed. Syst., 2008

An efficient run-time router for connecting modules in FPGAS.
Proceedings of the FPL 2008, 2008

2007
A Holistic Approach Towards a Unified CpE Laboratory Platform.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

FPGA Cluster Computing in the ETA Radio Telescope.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Hardware/Software Process Migration and RTL Simulation.
Proceedings of the FPL 2007, 2007

Formal Modeling of Process Migration.
Proceedings of the FPL 2007, 2007

Wires On Demand: Run-Time Communication Synthesis for Reconfigurable Computing.
Proceedings of the FPL 2007, 2007

2006
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays.
Proceedings of the 39th Hawaii International International Conference on Systems Science (HICSS-39 2006), 2006

2004
JHDLBits: The Merging of Two Worlds.
Proceedings of the Field Programmable Logic and Application, 2004

VTSim: A Virtex-II Device Simulator.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004


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