Brent E. Nelson

According to our database, Brent E. Nelson authored at least 76 papers between 1984 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Maverick: A Stand-alone CAD Flow for Xilinx 7-Series FPGAs.

Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules.

Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Third Party CAD Tools for FPGA Design - A Survey of the Current Landscape.

Brent E. Nelson

Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2017

Vivado design interface: An export/import capability for Vivado FPGA designs.

Thomas Townsend, Brent E. Nelson

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

Packing a modern Xilinx FPGA using RapidSmith.

Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

An XDL alternative for interfacing RapidSmith and Vivado.

Thomas Townsend, Brent E. Nelson, Michael J. Wirthlin

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Efficient processing of phased array radar in sense and avoid application using heterogeneous computing.

Luke Newmeyer, Doran Wilde, Brent E. Nelson, Michael J. Wirthlin

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015

RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs.

Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

Tincr - A custom CAD tool framework for Vivado.

Brad White, Brent E. Nelson

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013

Improving clock-rate of hard-macro designs.

Christopher Lavin, Brent E. Nelson, Brad L. Hutchings

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Impact of hard macro size on FPGA clock rate and place/route time.

Christopher Lavin, Brent E. Nelson, Brad L. Hutchings

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Rapid FPGA design prototyping through preservation of system logic: A case study.

Travis Haroldsen, Brent E. Nelson, Brad White

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2011

RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs.

Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

XDL-Based Module Generators for Rapid FPGA Design Implementation.

Subhrashankha Ghosh, Brent E. Nelson

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping.

Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010

A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs.

John Bodily, Brent E. Nelson, Zhaoyi Wei, Dah-Jye Lee, Jeff Chase

ACM Trans. Reconfigurable Technol. Syst., 2010

Hardware-Friendly Vision Algorithms for Embedded Obstacle Detection Applications.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald

IEEE Trans. Circuits Syst. Video Technol., 2010

Two-frame structure from motion using optical flow probability distributions for unmanned air vehicle obstacle avoidance.

Dah-Jye Lee, Paul C. Merrell, Zhaoyi Wei, Brent E. Nelson

Mach. Vis. Appl., 2010

Rapid prototyping tools for FPGA designs: RapidSmith.

Christopher Lavin, Marc Padilla, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings

Proceedings of the International Conference on Field-Programmable Technology, 2010

Using Hard Macros to Reduce FPGA Compilation Time.

Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis.

Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Multi-frame structure from motion using optical flow probability distributions.

Dah-Jye Lee, Paul C. Merrell, Brent E. Nelson, Zhaoyi Wei

Neurocomputing, 2009

Comparing fine-grained performance on the Ambric MPPA against an FPGA.

Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Optical Flow on the Ambric Massively Parallel Processor Array (MPPA).

Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis

Proceedings of the FCCM 2009, 2009

FPGA Design Productivity - A Discussion of the State of the Art and a Research Agenda.

Brent E. Nelson

Proceedings of the Reconfigurable Computing: Architectures, 2009

2008

Design, Debug, Deploy: The Creation of Configurable Computing Applications.

Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin

J. Signal Process. Syst., 2008

FPGA-Based Embedded Motion Estimation Sensor.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald, Barrett Edwards

Int. J. Reconfigurable Comput., 2008

Accurate Optical Flow Sensor for Obstacle Avoidance.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Kirt D. Lillywhite

Proceedings of the Advances in Visual Computing, 4th International Symposium, 2008

Real-time accurate optical flow-based motion sensor.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald

Proceedings of the 19th International Conference on Pattern Recognition (ICPR 2008), 2008

Real-Time Optical Flow Calculations on FPGA and GPU Architectures: A Comparison Study.

Jeff Chase, Brent E. Nelson, John Bodily, Zhaoyi Wei, Dah-Jye Lee

Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Design Productivity for Configurable Computing.

Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn A. Bohner

Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

2007

FPGA-based Real-time Optical Flow Algorithm Design and Implementation.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson

J. Multim., 2007

A Fast and Accurate Tensor-based Optical Flow Algorithm Implemented in FPGA.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Michael Martineau

Proceedings of the 8th IEEE Workshop on Applications of Computer Vision (WACV 2007), 2007

A Hardware-Friendly Adaptive Tensor Based Optical Flow Algorithm.

Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson

Proceedings of the Advances in Visual Computing, Third International Symposium, 2007

2006

The Mythical CCM: In Search of Usable (and Resuable) FPGA-Based General Computing Machines.

Brent E. Nelson

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005

A Flexible Circuit-Switched NOC for FPGA-Based Systems.

Clint Hilton, Brent E. Nelson

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Choice of base revisited: higher radices for FPGA-based floating-point computation (abstract only).

Bryan Catanzaro, Brent E. Nelson

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

Higher Radix Floating-Point Representations for FPGA-Based Arithmetic.

Bryan Catanzaro, Brent E. Nelson

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004

GigaOp DSP on FPGA.

Brad L. Hutchings, Brent E. Nelson

J. VLSI Signal Process., 2004

JHDLBits: The Merging of Two Worlds.

Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner

Proceedings of the Field Programmable Logic and Application, 2004

A Parallel FFT Architecture for FPGAs.

Joseph M. Palmer, Brent E. Nelson

Proceedings of the Field Programmable Logic and Application, 2004

2003

Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs.

Xiaojun Wang, Brent E. Nelson

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Reconfigurable Computing Application Frameworks.

Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2002

Debug methods for hybrid CPU/FPGA systems.

Eric Roesler, Brent E. Nelson

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture.

Eric Roesler, Brent E. Nelson

Proceedings of the Field-Programmable Logic and Applications, 2002

2001

Unifying simulation and execution in a design environment for FPGA systems.

Brad L. Hutchings, Brent E. Nelson

IEEE Trans. Very Large Scale Integr. Syst., 2001

Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification.

Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings

Proceedings of the Field-Programmable Logic and Applications, 2001

Instrumenting Bitstreams for Debugging FPGA Circuits.

Paul S. Graham, Brent E. Nelson, Brad L. Hutchings

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000

Designing and Debugging Custom Computing Applications.

Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin

IEEE Des. Test Comput., 2000

A Reconfigurable Computing Architecture for Microsensors.

Stephen M. Scalera, Mark Falco, Brent E. Nelson

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings.

Paul S. Graham, Brad L. Hutchings, Brent E. Nelson

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Using general-purpose programming languages for FPGA design.

Brad L. Hutchings, Brent E. Nelson

Proceedings of the 37th Conference on Design Automation, 2000

1999

Error control coding in software radios: an FPGA approach.

Gregory C. Ahlquist, Michael Rice, Brent E. Nelson

IEEE Wirel. Commun., 1999

Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing.

Paul S. Graham, Brent E. Nelson

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

Optimal Finite Field Multipliers for FPGAs.

Gregory C. Ahlquist, Brent E. Nelson, Michael Rice

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

A CAD Suite for High-Performance FPGA Design.

Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998

FPGA-Based Sonar Processing.

Paul S. Graham, Brent E. Nelson

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Frequency-Domain Sonar Processing in FPGAs and DSPs.

Paul S. Graham, Brent E. Nelson

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1996

Locality as a Visualization Tool.

Knuth Stener Grimsrud, James K. Archibald, Richard L. Frost, Brent E. Nelson

IEEE Trans. Computers, 1996

Transaction Processing Workloads - A Comparison to the SPEC Benchmarks Using Memory Hierarchy Performance Studies.

Brent E. Nelson, Gregory D. Thompson, J. Kelly Flanagan

Proceedings of the MASCOTS '96, 1996

The Inaccuracy of Trace-Driven Simulation Using Incomplete Mulitprogramming Trace Data.

J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Gregory D. Thompson

Proceedings of the MASCOTS '96, 1996

Genetic algorithms in software and in hardware-a performance analysis of workstation and custom computing machine implementations.

Paul S. Graham, Brent E. Nelson

Proceedings of the 4th IEEE Symposium on FPGAs for Custom Computing Machines (FCCM '96), 1996

1995

A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2.

Paul S. Graham, Brent E. Nelson

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1994

On the Accuracy of Memory Reference Models.

Knuth Stener Grimsrud, James K. Archibald, Richard L. Frost, Brent E. Nelson

Proceedings of the Computer Performance Evaluation, 1994

1993

Multiple Prefetch Adaptive Disk Caching.

Knuth Stener Grimsrud, James K. Archibald, Brent E. Nelson

IEEE Trans. Knowl. Data Eng., 1993

Evaluating Performance of Prefetching Second Level Caches.

Robert B. Smith, James K. Archibald, Brent E. Nelson

SIGMETRICS Perform. Evaluation Rev., 1993

BACH: a hardware monitor for tracing microprocessor-based systems.

Knuth Stener Grimsrud, James K. Archibald, M. Ripley, J. Kelly Flanagan, Brent E. Nelson

Microprocess. Microsystems, 1993

Incomplete Trace Data and Trace Driven Simulation.

J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Knuth Stener Grimsrud

Proceedings of the MASCOTS '93, 1993

1991

Performance analysis of inclusion effects in multi-level multiprocessor caches.

Brent E. Nelson, James K. Archibald, J. Kelly Flanagan

Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991

1989

Vector quantization codebook generation using simulated annealing.

J. Kelly Flanagan, Darryl Morrell, Richard L. Frost, Christopher J. Read, Brent E. Nelson

Proceedings of the IEEE International Conference on Acoustics, 1989

1988

Processor design using path programmable logic.

J. Kelly Flanagan, Brent E. Nelson

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1987

A multiprogrammed parallel architecture for digital signal processing.

Tao Li, Brent E. Nelson, J. Kelly Flanagan, Christopher J. Read

Proceedings of the IEEE International Conference on Acoustics, 1987

1986

A bit-serial VLSI vector quantizer.

Brent E. Nelson, Christopher J. Read

Proceedings of the IEEE International Conference on Acoustics, 1986

1984

Transforming an Ada Program Unit to Silicon and Verifying Its Behavior in an Ada Environment: A first Experiment.

Elliott I. Organick, Tony M. Carter, Mike P. Maloney, Alan L. Davis, Alan B. Hayes, Dan Klass, Gary Lindstrom, Brent E. Nelson, Kent F. Smith

IEEE Softw., 1984

The structure and operation of a relational database system in a cell-oriented integrated circuit design system.

Lee A. Hollaar, Brent E. Nelson, Tony M. Carter, Raymond A. Lorie

Proceedings of the 21st Design Automation Conference, 1984

Transforming an Ada Program Unit to Silicon and Testing It in an Ada Environment.

Tony M. Carter, Alan L. Davis, Alan B. Hayes, Gary Lindstrom, Dan Klass, Mike P. Maloney, Brent E. Nelson, Elliott I. Organick, Kent F. Smith

Proceedings of the COMPCON'84, Digest of Papers, Twenty-Eighth IEEE Computer Society International Conference, San Francisco, California, USA, February 27, 1984