Cesar Castanares

According to our database, Cesar Castanares authored at least 2 papers in 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Execution modeling in self-aware FPGA-based architectures for efficient resource management.

Alfonso Rodríguez, Juan Valverde, Cesar Castanares, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo

Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

Live demonstration: A dynamically adaptable image processing application running in an FPGA-based WSN platform.

Alfonso Rodríguez, Juan Valverde, Cesar Castanares, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015